-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On 3/30/2012 12:19 PM, Peter C. Wallace wrote: > I wonder for non software-step systems if a crude busywait from > thread invocation till hi-res timer count match could be used to > sacrifice some CPU for nS jitter times.
Is there some reason the hardware isn't sampling counts, positions, etc at fixed times to reduce the dependence on software polling jitter, or am I missing something basic? I'm still wrapping my head around the code... I do real-time on Windows, with no kernel patches! :) It is at a slower basic rate (a video field is apx. 15 mS), but I'm quite certain that our latency jitter is much more than 15x the values being discussed for RTAI. I probably have more than 5 uS jitter just in arbitration for the PCIe bus so I can _send_ an interrupt to the system processor (the system supports lots of DMA streams, and I'm pretty constantly moving around 500 MBytes/s or so of data in each direction). I understand the importance of the latency jitter spec for folks generating pulses via software, but it seems like it should be fairly insignificant for hardware assisted control. - -- Charles Steinkuehler [email protected] -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (MingW32) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ iEYEARECAAYFAk91/5gACgkQLywbqEHdNFysqgCg5VgjCOKlC2a3ML0FOhIRdpfa JSQAmwftKRZ8xJke3QyrLYNbXQS9SBfd =e/gb -----END PGP SIGNATURE----- ------------------------------------------------------------------------------ This SF email is sponsosred by: Try Windows Azure free for 90 days Click Here http://p.sf.net/sfu/sfd2d-msazure _______________________________________________ Emc-developers mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/emc-developers
