Hello Muhammad, Sorry for the little lengthy reply, but it is one of the most important considerations when designing Ethernet front end - I tried to summarize it.
First you need to consider what kind of PHY driver you use. Some PHYs transmitters are supplied from the center taps (CT), some are not. This varies with the manufacturer. With the PHYs that use CT as a source of power for the Tx, you generally can't have a common-mode choke (CMC) on the PHY side, because for the supply current to the TX that CM choke isn't CM, leading to supply voltage sags and preventing them to function properly. The PHYs that don't take Tx power supply from the CT can have a CMC on the PHY side. Be sure to distinguish between PHYs that just bias the pairs from the CT (in which case you CAN use a CMC on the PHY side) vs. the ones that actually feed Tx power through the CT. After this functional consideration, assume you have a case when you can use a CMC on the PHY side. CM voltage coupled to the pairs generates CM currents on the cables that cause most of the emission. On the PHY side of the transformer, you can have CM voltage between the differential (I/O) pairs and the local "ground" plane. One typical source of CM on the pair, generated in the PHY, would be ground bounce over the package lead inductance. A CMC on the PHY side is excellent to provide low-pass filter. It is similar to RC filter, because the CMCs are mostly resistive (high-loss ferrite material) elements. Working in conjunction with the CT capacitor, it essentially reduces and shunts the CM current and takes it back to the PHY (thus letting less CM current on the other side of the transformer). It works better than just a CT cap to filter the CM noise on the pair relative to the local reference "ground". Ideally, this method with the CMC on the PHY side would leave near O V of CM voltage on the CT. Practically, this is very effective method to reduce CM voltage produced by, or coupled from the PHY, but leaves a possibility that any noise on the "ground" planes escapes unimpeded to the UTP. Because of the imbalance in the CT of the transformers, lead inductance in the transformer package, and inductance through the CT capacitor, the effectiveness of this filter starts decreasing after about 200 (maybe 300) MHz. Now about the potential problem when the CMC is on the PHY side. Depending on the design of your board and the system, you may have significant RF voltage between the chassis (front-panel) and the "ground" at the location of the center tap. When the only CMC is on the PHY-side, there is basically nothing to prevent the voltage coupled from the "ground" to the CT from causing CM currents on the cable and emission. Therefore, it is very important to keep the voltage of the "ground" plane to which the CT connects (usually through a cap) at very low levels relative to the I/O panel and chassis. The "ground" noise that may pop-up in emission scan is typically in the couple of hundreds MHz and higher, because the "ground" inductance (impedance), can usually be kept relatively low (in well designed systems). A CMC on the wire-side limits all CM currents, regardless of which segment of the transformer it is coupled into. However, you loose the benefit of RC- filtering the low-frequency Ethernet noise that comes from the PHY. Practical advice: IF you are looking for best performance, IF you can afford it, and IF the functional requirement allows it, buy transformers with a low-frequency CMC on the PHY side AND with a high-frequency CMC on the cable side. Most practical designs are however limited to only one CMC per pair, and in that case I would always start design with a cable-side CMC. That is less expensive (less ferrite cores in the part), works with any PHY, and the practice shows it suffices for EMC-compliant design. Beware of CM-termination and autotransformers, since they can also provide a path for unwanted coupling across the CMC. I am refraining from discussing the CM termination here, it would take too much e-paper. All previously said also applies to immunity considerations, just reverse the current path. If you can get access to it, see Broadcom application note "10/100 and Gbit PHYs, EMC Design Guidelines". You'd need a password from your Broadcom rep to get it. Neven > Here is a question for you Gurus.. > > I was looked at a few different rj45 with integrated magnetics. While all of > them were different in some respect, I found two major categories - one with > common mode choke on the chip (IC) side while others with common mode choke on > the cable side. My question would be "why would one want to use a connector > with common mode choke on the chip side vs connector with common mode choke on > the cable side??? I wanted to know specific scenario where a person would > prefer one over the other." > > Here I would like to add that most of the problems I have seen in my short > career are due to common mode noise making its way to the cable. > > Also, I would appreciate if someone could point me to a document where I could > find rules/factors to consider while selecting a jack with integrated magnetics > . > > Muhammad > This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Ron Pickard: emc-p...@hypercom.com Dave Heald: davehe...@attbi.com For policy questions, send mail to: Richard Nute: ri...@ieee.org Jim Bacher: j.bac...@ieee.org Archive is being moved, we will announce when it is back on-line. All emc-pstc postings are archived and searchable on the web at: http://www.ieeecommunities.org/emc-pstc
