Seb >> if none of these are what you want then yes you need to write your own >> VHDL. > > Yes, that's what I need to do.. > > I downloaded the Xilinx developer code. Wow - there's a lot of it, but > it seems it caters for all of their products. Can anyone help kickstart > my vhdl tinkering by a quick description of the development process to > create the .bit files that you load onto the Xilinx chip on the Mesa > board? >
That is a tall order and I am afraid I am only going to give a superficial idea - I hope it is not insulting. You essentially provide two inputs. A source file of the hardware description language and a set of "constraints". In the simplest form these constraints are the mapping of HDL signal names onto physical pins of the chip and defining the electrical characteristics (e.g. LSTTL, pullups etc.) of the pins. The Xilinix ISE automates the workflow when you have this data by double clicking on any stage in the Process pane.. I have uploaded a short movie of this at www.castlewoodconsultants.com/Misc/ISEWorkflow.wmv I am afraid I use Verilog as HDL so cannot give you a VHDL example with which to play. John Prentice ------------------------------------------------------------------------- This SF.net email is sponsored by DB2 Express Download DB2 Express C - the FREE version of DB2 express and take control of your XML. No limits. Just data. Click to get it now. http://sourceforge.net/powerbar/db2/ _______________________________________________ Emc-users mailing list Emc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-users
