On Fri, 2008-04-25 at 17:02 -0400, John Kasunich wrote: ... snip > exactly right. I do know it is over 5V, enough to nicely saturate a > logic level FET, and would probably do OK with a normal FET. > > If you need more details don't hesitate to ask. > > Regards, > > John Kasunich
I guess I need a little more help than I thought. Here is my first pass at your board schematic: http://www.wallacecompany.com/machine_shop/Shizuoka/watchdog-1a.png I guessed at the FET array pins and some bits are missing but I think I got the watchdog part. If the input is constantly low the signal to the FET will be low. If the input is constantly high, the signal to the FET will be the division of R2 and R5? What I need is; 0 to < x Hz = low, x Hz to high = low, x Hz = high, or a band-pass filter. -- Kirk Wallace (California, USA http://www.wallacecompany.com/machine_shop/ Hardinge HNC/EMC CNC lathe, Bridgeport mill conversion, doing XY now, Zubal lathe conversion pending Craftsman AA 109 restoration Shizuoka ST-N/EMC CNC) ------------------------------------------------------------------------- This SF.net email is sponsored by the 2008 JavaOne(SM) Conference Don't miss this year's exciting event. There's still time to save $100. Use priority code J8TL2D2. http://ad.doubleclick.net/clk;198757673;13503038;p?http://java.sun.com/javaone _______________________________________________ Emc-users mailing list Emc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-users
