Hi Eric - To your earlier post regarding implementing within an FPGA the circuitry Alberto pointed to. Yes, this is easily done. In fact, I'd think you could improve upon the design, too. For example, in the schematic you really don't want the 43K resistor across the 470 uF cap - it, in series with the 15k resistor, will continually discharge the cap, meaning that the VCO control voltage (and thus frequency) will continually vary as the cap discharges and the phase-comparator pumps it back up to regain phase-lock. Ideally, if you're in lock, you would like the control voltage to be an unvarying DC level.
Anyway - you could certainly implement all the digital circuitry as well as a '4046-style phase comparator within the fpga and drive an external loop filter, similar to shown in the schematic. Or...you could even attempt loop filtering within the fpga and generate the VCO control voltage a number of ways - drive a dac, for example (similar to Shera's design - which I use here to drive an HP 106B, by the way). But no matter which route is followed, much attention needs to be paid to ground & power routing, layout, etc, to ensure that minimal noise is added to the VCO control voltage from external sources. - Jeff, WA6AHL
