https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99195

--- Comment #10 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Kyrylo Tkachov <ktkac...@gcc.gnu.org>:

https://gcc.gnu.org/g:93c26deab98fc80b616a1c53c324a88f61036f53

commit r14-473-g93c26deab98fc80b616a1c53c324a88f61036f53
Author: Kyrylo Tkachov <kyrylo.tkac...@arm.com>
Date:   Thu May 4 09:42:37 2023 +0100

    aarch64: PR target/99195 annotate simple ternary ops for vec-concat with
zero

    We're now moving onto various simple ternary instructions, including some
lane forms.
    These include intrinsics that map down to mla, mls, fma, aba, bsl
instructions.
    Tests are added for lane 0 and lane 1 as for some of these instructions the
lane 0 variants
    use separate simpler patterns that need a separate annotation.

    Bootstrapped and tested on aarch64-none-linux-gnu.

    gcc/ChangeLog:

            PR target/99195
            * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename
to...
            (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
            (aarch64_mla<mode>): Rename to...
            (aarch64_mla<mode><vczle><vczbe>): ... This.
            (*aarch64_mla_elt<mode>): Rename to...
            (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
            (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
            (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ...
This.
            (aarch64_mla_n<mode>): Rename to...
            (aarch64_mla_n<mode><vczle><vczbe>): ... This.
            (aarch64_mls<mode>): Rename to...
            (aarch64_mls<mode><vczle><vczbe>): ... This.
            (*aarch64_mls_elt<mode>): Rename to...
            (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
            (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
            (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ...
This.
            (aarch64_mls_n<mode>): Rename to...
            (aarch64_mls_n<mode><vczle><vczbe>): ... This.
            (fma<mode>4): Rename to...
            (fma<mode>4<vczle><vczbe>): ... This.
            (*aarch64_fma4_elt<mode>): Rename to...
            (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
            (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
            (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ...
This.
            (*aarch64_fma4_elt_from_dup<mode>): Rename to...
            (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
            (fnma<mode>4): Rename to...
            (fnma<mode>4<vczle><vczbe>): ... This.
            (*aarch64_fnma4_elt<mode>): Rename to...
            (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
            (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
            (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ...
This.
            (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
            (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
            (aarch64_simd_bsl<mode>_internal): Rename to...
            (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
            (*aarch64_simd_bsl<mode>_alt): Rename to...
            (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.

    gcc/testsuite/ChangeLog:

            PR target/99195
            * gcc.target/aarch64/simd/pr99195_3.c: New test.

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