[Bug target/128162] [17 Regression] wrong code at -O2: vwmacc.vx whose source is the upper half of the accumulator raises SIGILL

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=128162

--- Comment #11 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Pan Li <pa...@gcc.gnu.org>:

https://gcc.gnu.org/g:b20dc9dbc78c52cde85c20cdca0b04e1125a6643

commit r17-5722-gb20dc9dbc78c52cde85c20cdca0b04e1125a6643
Author: Pan Li <pan2...@intel.com>
Date:   Wed Oct 28 10:38:39 2026 +0800

    RISC-V: Disable RVV register overlap for vwmacc[u].vv [PR target/128162]

    Revert the register overlap of the widening multiply-add insn
    vwmacc[u].vv and the related test cases.

    The insn reads the vd as the accumulator with EEW = 2 * SEW, while
    the vs1 and vs2 are read with EEW = SEW.  The section 5.2 of the
    vector spec reserves any encoding in which one vector register
    supplies source operands with two or more different EEWs.  Thus,
    the vs1 and vs2 must not overlap the vd register group, even in the
    highest-numbered part.  For example, below asm dump is reserved as
    the v3 is read with both the EEW = 32 and the EEW = 16.

      vwmacc.vv v2,v3,v4   # LMUL = 1, SEW = 16

    This reverts commit(s):
      2be327c50de RISC-V: Allow RVV register overlap for vwmacc[u].vv
      55afdf36b7a RISC-V: Add test cases for vwmacc.vv reg overlap
      4f75092d25c RISC-V: Add test cases for vwmaccu.vv reg overlap
      c5d147d7370 RISC-V: Add more test cases for vwmacc[u].vv

            PR target/128162

    gcc/ChangeLog:

            * config/riscv/vector.md: Revert Wvr constraint to the
            early clobber vr.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-m1.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-m2.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-m4.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-mf2.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i16-mf4.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-m1.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-m2.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-m4.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i32-mf2.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-m1.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-m2.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-m4.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-mf2.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-mf4.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmacc_vv-i8-mf8.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-m1.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-m2.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-m4.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-mf2.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u16-mf4.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-m1.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-m2.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-m4.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u32-mf2.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-m1.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-m2.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-m4.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-mf2.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-mf4.c:
Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/vwmaccu_vv-u8-mf8.c:
Removed.
            * gcc.target/riscv/rvv/base/pr112431-49.c: Removed.
            * gcc.target/riscv/rvv/base/pr112431-50.c: Removed.
            * gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h:
            Remove test helper macros.

    Signed-off-by: Pan Li <pan2...@intel.com>