Tamar Christina <tamar.christ...@arm.com> writes:
> Hi All,
>
> The simd-clone-7.cc tests seem to fail on big-endian with
>
> testsuite/g++.dg/vect/simd-clone-7.cc:7:1: warning: GCC does not currently
> support mixed size types for 'simd' functions
>
> The test probably miss an effective target check?
The current condition is:
// { dg-warning "GCC does not currently support mixed size types for 'simd'
functions" "" { target aarch64-*-* } .-4 }
That would need to be aarch64*-*-* to include big-endian. Fixing that
here and in the other tests is OK under the obvious rule.
Adding && lp64 (as per Steve's patch below) is OK too if it works.
Thanks,
Richard
>> -----Original Message-----
>> From: gcc-patches-ow...@gcc.gnu.org <gcc-patches-ow...@gcc.gnu.org>
>> On Behalf Of Steve Ellcey
>> Sent: Friday, January 18, 2019 17:58
>> To: christophe.l...@linaro.org
>> Cc: gcc-patches@gcc.gnu.org; Richard Sandiford
>> <richard.sandif...@arm.com>
>> Subject: Re: [EXT] Re: [Patch 2/4][Aarch64] v2: Implement Aarch64 SIMD ABI
>>
>> On Fri, 2019-01-18 at 15:35 +0100, Christophe Lyon wrote:
>> >
>> > Hi Steve,
>> >
>> > I've noticed that
>> > FAIL: g++.dg/vect/simd-clone-7.cc -std=c++14 (test for warnings,
>> > line 7) (and for c++17 and c++98) when forcing -mabi=ilp32.
>> >
>> > I suspect you want to skip the test in this case?
>> >
>> > Christophe
>>
>> Actually, I think we can compile that test, it just would not generate a
>> warning in ILP32 mode because int, floats and pointers would now all be the
>> same size. So I think the fix is:
>>
>>
>> % git diff simd-clone-7.cc
>> diff --git a/gcc/testsuite/g++.dg/vect/simd-clone-7.cc
>> b/gcc/testsuite/g++.dg/vect/simd-clone-7.cc
>> index c2a63cd5f8e..3617f0ab6a7 100644
>> --- a/gcc/testsuite/g++.dg/vect/simd-clone-7.cc
>> +++ b/gcc/testsuite/g++.dg/vect/simd-clone-7.cc
>> @@ -8,4 +8,4 @@ bar (float x, float *y, int) {
>> return y[0] + y[1] * x;
>> }
>> -// { dg-warning "GCC does not currently support mixed size types for 'simd'
>> functions" "" { target aarch64-*-* } .-4 }
>> +// { dg-warning "GCC does not currently support mixed size types for
>> +'simd' functions" "" { target { { aarch64-*-* } && lp64 } } .-4 }
>>
>>
>> I haven't tested this, I don't have an ILP32 build sitting around right now.
>> Does it work for you? I can build a toolchain, test it, and submit a patch
>> if you
>> want.
>>
>>
>> Steve Ellcey
>> sell...@marvell.com
