Steve Ellcey <sell...@marvell.com> writes:
> Here are the failures I am getting with this patch:
>
> c-c++-common/gomp/pr63328.c
> gcc.dg/gomp/pr87895-2.c
>
> These tests include another test (which passes) and the included tests
> have a dg-warning check.  For some reason the dg-warning in the include
> is ignored

Yeah, that's expected.  Only dg- markup in the test file itself
is relevant.

> and when I tried adding one in the main file (that includes
> the other test), that didn't work either.

I suggest for now we add:

/* { dg-excess-errors "partial simd clone support" { target { aarch64*-*-* } } 
}  */

> gcc.dg/gomp/simd-clones-1.c
> g++.dg/gomp/declare-simd-1.C
>
> These two tests are generating an ICE and I am not sure why.
>
> I cut declare-simd-1.C down to:
>
> #pragma omp declare simd simdlen (2) aligned (b : sizeof (long long) * 2)
> __extension__ long long
> f10 (long long *b)
> {
>       return *b;
> }
>
> And it results in:
>
> % install/usr/bin/g++ -fopenmp-simd -c b1.C
> during RTL pass: expand
> b1.C: In function ‘long long int f10(long long int*)’:
> b1.C:5:15: internal compiler error: in expand_assignment, at expr.c:5101
>     5 |       return *b;
>       |               ^
> 0xaeee73 expand_assignment(tree_node*, tree_node*, bool)
>       /home/sellcey/gcc-vect/src/gcc/gcc/expr.c:5101
> 0x9aeecf expand_gimple_stmt_1
>       /home/sellcey/gcc-vect/src/gcc/gcc/cfgexpand.c:3746
> 0x9aeecf expand_gimple_stmt
>       /home/sellcey/gcc-vect/src/gcc/gcc/cfgexpand.c:3844
> 0x9b682f expand_gimple_basic_block
>       /home/sellcey/gcc-vect/src/gcc/gcc/cfgexpand.c:5880
> 0x9b90a7 execute
>       /home/sellcey/gcc-vect/src/gcc/gcc/cfgexpand.c:6503
> Please submit a full bug report,
> with preprocessed source if appropriate.
> Please include the complete backtrace with any bug report.
> See <https://gcc.gnu.org/bugs/> for instructions.

I haven't checked whether this is the reason, but:

> +  clonei->vecsize_mangle = 'n';
> +  clonei->mask_mode = VOIDmode;
> +  clonei->vecsize_int = (num == 0) ? 64 :128;
> +  clonei->vecsize_float = (num == 0) ? 64 :128;
> +  if (clonei->simdlen == 0)
> +    {
> +      if (SCALAR_INT_MODE_P (TYPE_MODE (base_type)))
> +     clonei->simdlen = clonei->vecsize_int;
> +      else
> +     clonei->simdlen = clonei->vecsize_float;
> +      clonei->simdlen /= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type));
> +      return 2;
> +    }
> +
> +  /* Restrict ourselves to vectors that fit in a single register  */
> +
> +  gcc_assert (tree_fits_shwi_p (TYPE_SIZE (base_type)));
> +  vsize = clonei->simdlen * tree_to_shwi (TYPE_SIZE (base_type));
> +  if (vsize != 64 && vsize != 128)
> +    {
> +      warning_at (DECL_SOURCE_LOCATION (node->decl), 0,
> +               "GCC does not currently support simdlen %d for type %qT",
> +               clonei->simdlen, base_type);
> +      return 0;
> +    }
> +  return 2;
> +}

...this doesn't handle explicit simdlen correctly.  The vecsize_int and
vecsize_float need to be set from the user's simdlen, with num only
making a difference for the default simdlen.  And there should only
be 1 size for an explicit simdlen.

Maybe this would be more obvious if we have something like:

  unsigned int elt_bits = GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type));
  unsigned int vec_bits, count;
  if (clone->simdlen == 0)
    {
      count = 2;
      vec_bits = (num == 0 ? 64 : 128);
      clone->simdlen = vec_bits / elt_bits;
    }
  else
    {
      count = 1;
      vec_bits = clone->simdlen * elt_bits;
      if (vec_bits != 64 && vec_bits != 128)
        {
          ...warning...
          return 0;
        }
    }
  clone->vecsize_int = vec_bits;
  clone->vecsize_float = vec_bits;
  return count;

Thanks,
Richard

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