Hi! On Fri, Dec 30, 2022 at 10:22:31AM +0800, Jiufu Guo wrote: > Considering the limitations of CSE, I try to find other places > to handle this issue, and notice DSE can optimize below code: > "[sfp:DI]=x:DI ; y:SI=[sfp:DI]" to "y:SI=x:DI#0". > > So, I drafted a patch to update DSE to handle DI->DF/SF. > The patch updates "extract_low_bits" to get mode change > with subreg. > > diff --git a/gcc/expmed.cc b/gcc/expmed.cc > index b12b0e000c2..5e36331082c 100644 > --- a/gcc/expmed.cc > +++ b/gcc/expmed.cc > @@ -2439,7 +2439,10 @@ extract_low_bits (machine_mode mode, machine_mode > src_mode, rtx src) > > if (!targetm.modes_tieable_p (src_int_mode, src_mode)) > return NULL_RTX; > - if (!targetm.modes_tieable_p (int_mode, mode)) > + if (!targetm.modes_tieable_p (int_mode, mode) > + && !(known_le (GET_MODE_BITSIZE (mode), GET_MODE_BITSIZE (src_mode)) > + && GET_MODE_CLASS (mode) == MODE_FLOAT > + && GET_MODE_CLASS (src_mode) == MODE_INT)) > return NULL_RTX; > > src = gen_lowpart (src_int_mode, src);
Ah! This simply shows rs6000_modes_tieable_p is decidedly non-optimal: it does not allow tying a scalar float to anything else. No such thing is required, or good apparently. I wonder why we have such restrictions at all in rs6000; is it just unfortunate history, was it good at one point in time? Segher