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Just to be clear, you don't need to know any of this in order to use Icarus Verilog. The vvp format can be treated as a compiled form generated by the iverilog -tvvp compiler, and run by the vvp engine. I'm assuming from the detail you are requesting that you want to know "how and why" in order to poke and prod for pleasure or to work on the compiler generator or vvp engine. Karthik Parashar wrote: > As i understand, broadly, there are 2 types of > arithmetic and logical instruction. > > The structural type and the procedeural(supposedly > generated from the behavioral code) > What does it mean in terms of verilog code, to > generate > > 1.a structural addition like .arith/add > 2.an indexed addition like %ix/add > 3.a behavioral addition %add Structural addition (or any structural operation) comes from things like continuous assignments or module port bindings. They are things that react to stimulus and are simulated by passing events around through nets. An example: wire [7:0] foo = a + b; This is a continuous assignment, and you will get an .arith/add node out of it. There are similar nodes for the whole bunch of different operators that are available in continuous assign and similar contexts. What's distinct about these is that they are connected together in a graph of links, and they are simulated by propagating values through the netlist. Propagations create scheduling items that are enqueued and scheduled. > Also since the above class of instructions exist for > other arithmetic and logical instructions, it is > important to understand this distiction so as to > understnad VVP. It helps, I think. > Similarly, there are thread load/store and the index > register load store instructions. > As i understand, all the nets and vars are modeled as > thread wise, single bit registers where as the index > registers are used to load and store from memory or > store temporary states of nets and vars. Not quite. The nets and variables are structural items line .net, .var, etc. The threads contain private registers that it uses for doing processing on values. There are bit registers that carry 01xy values, and there are word (formally index) and real registers that carry word and real values. The "%foo ..." statments are sequentially executed statements that look and smell a lot like a typical CPU assembly language. There are statements to read values from the netlist, write values to variables in the netlist, and process values that are read into thread working registers. Behavioral code, which is inherintly sequential, is translated into this sort of code much the way that C compilers make assembly statements. The obvious difference is that the "memory" is actually the netlist made up by the structural statements, and there are different classes of registers for holding values. - -- Steve Williams "The woods are lovely, dark and deep. steve at icarus.com But I have promises to keep, http://www.icarus.com and lines to code before I sleep, http://www.picturel.com And lines to code before I sleep." -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.2.5 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iD8DBQFD6N0OrPt1Sc2b3ikRAsMJAJ4qKsqbr44dlFTHBSKgIfKafR0fiACcCWY1 xEuzjJhC3KWQ1H6pTpR02ig= =s+3c -----END PGP SIGNATURE-----
