--- Stephen Williams <[EMAIL PROTECTED]> wrote: > -----BEGIN PGP SIGNED MESSAGE----- > Hash: SHA1 > > Karthik Parashar wrote: > > Hi, > > > > I have one interesting observation when it comes > to > > iverilog's vvp assembly instructions. Which is as > > follows: > > > > "Between the thread activities, there is no > dependecy > > on the threads 2^16 bit-wise registers." > > I think what you are saying is that the thread > bit-wise > registers are not accessible to other threads. That > is > a true statement. Threads only interact through > variables > and events. > > For example, it would be completely reasonable to > swap out > all the thread bits/registers when switching to > another > thread.
I'm sorry for the confusion! What i want to know is, when a "%delay" is encountered in the vvp assembly, the thread's bit-wise registers dont seem to be having any dependency. Which means, in case, i try to save the thread context when a delay occurs, i dont have to keep a backup of these thread wise registers. Is this true? Regards, ~Karthik. __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com
