Hi, I have one interesting observation when it comes to iverilog's vvp assembly instructions. Which is as follows:
"Between the thread activities, there is no dependecy on the threads 2^16 bit-wise registers." Steve and others, kindly validate the above statement! So far in the kind of verilog code, that i've compiled, its been that. Regards, ~Karthik. __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com
