On Fri, Apr 8, 2011 at 2:18 PM, DJ Delorie <d...@delorie.com> wrote: > >> # shorting trace >> Pad [ -1.550mm 0.000mm 1.550mm 0.000mm 0.5mm 0.5mm 0.700mm "c" "c" >> "square" ] > > > Perhaps a new flag for pads that means "non-net copper" ? Then > "square,nonnet" (for example) tells 'o' to ignore that copper when > determining connectivity, but DRC would still check it for > manufacturability. > > In theory, we could support that flag in *any* object, but I'm not > sure how to manage the relationship between, say, a non-net trace on > an inner plane and the schematic/netlist. I asked someone who used a > BigName EDA package how they did it, and they had a completely > different class of object for these - a net-linking object in the > schematics, netlist, and layout. >
Seems like a neat concept. Suppose it would be treated as regular copper throughout PCB except that when the netlister got to it, it would not cross it. _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
