> On April 25, 2012, 7:54 a.m., Ali Saidi wrote: > > src/cpu/static_inst.hh, line 311 > > <http://reviews.gem5.org/r/1153/diff/3/?file=26154#file26154line311> > > > > The fact that we need to add this concerns me a lot. We're adding about > > a cache line of size to each static instruction here. That seems like an > > unreasonable amount of storage. > > > > Really all these need to be dynamically allocated instead of the worst > > case maximums.
I think the extra space is the biggest cost with this change, so it would be nice to understand the impact there. Do you think there would be performance impact from this being allocated separately on the heap instead of in the structure itself? If it's in the structure it can be accessed with an offset from the StaticInst pointer, but if it's on the heap you have to go through a pointer to get to it. It would be nice to understand that tradeoff too. If it's better to have the pointer and save the space, then we may want to change the way the existing index arrays work. - Gabe ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1153/#review2611 ----------------------------------------------------------- On April 24, 2012, 2:13 p.m., Nilay Vaish wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1153/ > ----------------------------------------------------------- > > (Updated April 24, 2012, 2:13 p.m.) > > > Review request for Default. > > > Description > ------- > > Changeset 8966:c8c03cb78aa1 > --------------------------- > ISA Parser: Decide source register indices at runtime > Currently the register indices for source and destination registers are > decided > statically by the isa parser. This patch moves this decision to run time. This > will be useful when register will be read based on a condition specified while > construction of a microop. > > > Diffs > ----- > > src/arch/isa_parser.py 91a6f8f07074 > src/cpu/static_inst.hh 91a6f8f07074 > > Diff: http://reviews.gem5.org/r/1153/diff/ > > > Testing > ------- > > > Thanks, > > Nilay Vaish > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
