I'm not sure I all the way understand why the register file shouldnt be defined in the ISA...
I could see maybe there being one standard integer and floating point register file thats totally generic however, the system/miscellaneous registers are pretty ISA dependent so those register probably need to be defined in some custom manner. Anyway, I was just about to rearrange everything so that all accesses to registers use the ThreadContext instead of directly going through the CPU (for the InOrder model at least). I'll assume that I should hold off on that for now? On Mon, Feb 16, 2009 at 11:17 PM, nathan binkert <n...@binkert.org> wrote: > > If #2 didnt exist, then that would make more sense to me. That would make > an > > instruction HAVE to use the threadContext interface to access any CPU > > facilities. That would also remove the CPU pointer from the instruction > > object as well. > > > > If that were the solution, I would be OK with it, because then the CPU > would > > be appropriately encapsulated away from an instruction's commands... > > It turns out that I had forgotten about the relationship between > ThreadContext, ExecContext, and registers. I had a chance to discuss > this with Steve and Gabe today and Gabe has agreed to write something > up to describe how to solve this problem cleanly across the CPU > models. I think that part of the problem is that the register file > shouldn't really be defined in the ISA, and the ExecContext needs a > consistent way for accessing registers. We'll probably end up with > new functions for accessing registers from other threads instead of > modifying the existing ones. Hopefully one of the things that will > fall out of this work is consistent, working thread support across the > various CPU models. > > Nate > _______________________________________________ > m5-dev mailing list > m5-dev@m5sim.org > http://m5sim.org/mailman/listinfo/m5-dev > -- ---------- Korey L Sewell Graduate Student - PhD Candidate Computer Science & Engineering University of Michigan
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