Le dimanche 11 janvier 2009 à 21:31 -0500, Ian Chapman a écrit : > Thanks for the clarification Sylvere, > I guess it's not a bug after all just a loose end in 1164. I guess > that all the words about strict type checking is not that well > implemented in the standards. Thanks again for the clarification Ian. >
Futhermore, if Lattice is a synthesis tool it can check the output vector length of the "+" operation because a synthesis tool use techniques like function expansion, loop unrolling and constant propagation that permit to have more information and more checking. Theses techniques are only applicable on a subset a VHDL (for example synthetizable code). A simulator is more generalist and check result at run-time after "+" function call. (well known "bound check failed") _______________________________________________ Ghdl-discuss mailing list [email protected] https://mail.gna.org/listinfo/ghdl-discuss
