On Fri, 15 Mar 2019, Juliusz Chroboczek wrote:
PIE [...] lends itself better for implementation in existing hardware,
or hardware with small modification.
Could one of you please explain why?
Packet accelerators work either by completely autonomously forwarding
packet without CPU involvement, or it works by flow offload. This
basically means that on this kind of hardware if you tcpdump packets
you'll see the first TCP handshake packets and then kernel sees nothing.
It's now offloaded to the packet forwarding hardware, including all
queueing decisions.
I am not an expert on exact implementations, but WRED is available on a
lot of platforms. PIE seems to be taking a stance in WRED and adding a bit
of control logic on top of it, and that's that. It means PIE has a
possibility to be retrofitted onto older hardware.
FQ part of FQ_CODEL means you need to have a lot of queues, and you need
to L4 hash onto these different queues. That's just not possible on a lot
of HW.
I don't know if CODEL can be retrofitted onto WRED style HW, but I don't
think so.
My observation has been that the bufferbloat movement has focused on
academic excellence and making this work on the platforms they have
available to them. Nothing wrong with that and the results are great, it's
just not applicable to a lot of equipment out there that it should be
applicable to.
--
Mikael Abrahamsson email: swm...@swm.pp.se
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