Chaining these control blocks requires supporting environment and setups as 
follow:

AR register basing ASNALET needs to be setup.

AR register basing ASXBFTCB needs to be setup.

Instead of "LAE R4,TCBRBP", it should be "L R4,TCBRBP".

Target address space needs to be on your access-list.

Target address space must be non-swappable.


Raymond Wong



-----Original Message-----
From: Micheal Butz <michealb...@optonline.net>
To: IBM-MAIN <IBM-MAIN@bama.ua.edu>
Sent: Tue, Mar 6, 2012 8:30 pm
Subject: Re: LAE instruction


Or a more practical use of LAE

s chaing thru control blocks from another address space 
AC. 512
AM   R3,R3,ASNALET
.       R3,ASXBFTCB
SING TCB,R3
AE.   R4,TCBRBP
SING R4,RB


ent from my iPhone
On Mar 6, 2012, at 5:53 PM, Rob Scott <rsc...@rocketsoftware.com> wrote:
> Micheal, 
 
 Putting a bit of "meat on the bones" to create an example piece of code with 
omments and notes :
 
 (o) We are going to process a linked list of "FOO" elements in a dataspace and 
alculate some random hash value based on a subset of bytes in the FOO_NAME 
ield.
 (o) This code has been just typed into my e-mail - they may be typos/errors
 (o) "WA" is the working storage structure/DSECT
 
 
 DO    ,
    ALESERV ADD,STOKEN=WA_FOO_STOKEN,      Add dataspace containing linked list 
f FOOs
                ALET=WA_FOO_ALET,          
                AL=WORKUNIT,                
               MF=(E,WA_ALESERV_LIST)
    DOEXIT (LTR,R15,R15,NZ)            Failed - quick exit
    SAC    512                    AR-Mode (1)
    SYSSTATE ASCENV=AR                Inform assembler of AR-mode
    L    R6,WA_FOO_HEAD            Get head of list
    LAM    AR6,AR6,WA_FOO_ALET        Get dataspace ALET (2) 
    USING FOO,R6                    
    DO UNTIL=(ICM,R6,B'1111',FOO_NEXT,Z)    Traverse list (3)
            LAE    R7,FOO_NAME            Point to FOO_NAME (4)
            LAE    R1,8(,R7)            Use R1 for temp pointer (5)
        XC    WA_HASH,WA_HASH        Zero hash value
            DO FROM=(R14,=AL4(L'FOO_NAME-8))
            XR    R0,R0            
            IC    R0,0(,R1)        Get 1-byte (6)
            AL    R0,WA_HASH        Add to hash value
            ST    R0,WA_HASH        Store new value
            LAE    R1,1(,R1)        Next byte of name (6)
        ENDDO
        NC    WA_HASH,=X'000000FF'    0-255 range for hash    
    ENDDO
    SAC    0                    Inform assembler (7)
    SYSSTATE ASCENV=P
 ENDDO                            (8)            
 
 ....rest of code (9)
 
 Notes :
 
 (1) I think it is always worth having a macro to do both the SAC and the 
YSSTATE for you in one hit (not shown)- stops you forgetting the SYSSTATE and 
hat can confuse any macros that follow.
 (2) Loading the ALET in to the AR for the first time - R6 will be able to 
ddress data in the dataspace
 (3) AR-mode makes traversing data structures in dataspaces easy as you can 
ust use normal instructions (if you play by the rules)
 (4) Because LAE used and FOO dsect covers R6+AR6 - AR7 will contain ALET for 
ataspace after instruction executed
 (5) This time we are using R1 to point at 8 bytes into FOO_NAME (for whatever 
eason) - note that AR1 will get the dataspace ALET
 (6) Loading and using a byte from the dataspace 
 (7) See (1) 
 (8) Assuming all ARs are zero before we start, if the code goes thru 
uccessfully, then AR1, AR6 and AR7 will contain the ALET of the dataspace here 
 you may wish to consider zeroing the ARs at this point if they are no longer 
eeded.
 (9) Prudent use of "LAM   AR14,AR1,=4A(0)" will protect you from unintentional 
R values in "working" regs after calling certain system services - you can 
ever be sure how in-house macros expand.  
 
 Hope this helps
        
 
 Rob Scott
 Lead Developer
 Rocket Software
 275 Grove Street * Newton, MA 02466-2272 * USA
 Tel: +1.781.684.2305
 Email: rsc...@rs.com
 Web: www.rocketsoftware.com
 
 
 -----Original Message-----
 From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of 
icheal Butz
 Sent: 06 March 2012 21:53
 To: IBM-MAIN@bama.ua.edu
 Subject: Re: LAE instruction
 
 So  SAC 512
    LAE R3,0(,R4)
 
 R3 is CPYA from access R4  right 
 
 -----Original Message-----
 From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of 
cKown, John
 Sent: Tuesday, March 06, 2012 4:22 PM
 To: IBM-MAIN@bama.ua.edu
 Subject: Re: LAE instruction
 
 Yes, from the LAE instruction text:
 
 <quote>
 The address specified by the X2, B2, and D2 fields is placed in general 
egister R1. Access register R1 is loaded with a value that depends on the 
urrent value of the address-space-control bits, bits 16 and
 17 of the PSW. If the address-space-control bits are
 01 binary, the value placed in the access register also depends on whether the 
2 field is zero or non- zero.
 
 ...
 
 PSW Bits
 16 and 17
 Value Placed in Access Register R1
 00 00000000 hex (zeros in bit positions 0-31)
 
 10 00000001 hex (zeros in bit positions 0-30 and one in bit position 31)
 
 01 If B2 field is zero: 00000000 hex (zeros in bit positions 0-31) If B2 field 
s nonzero: Contents of access register B2
 
 11 00000002 hex (zeros in bit positions 0-29 and 31, and one in bit position 
0)
 
 From the SAC instruction 
 
 Code    Name of Mode        Result in PSW Bits 16 & 17
 0000    Primary space        00
 0001    Secondary space    10
 0010    Access register    01
 0011    Home space            11
 All others Invalid
 
 </quote>
 
 SAC 512 has is '0010' from the above and results in b'01' or AR mode in the 
SW bits 16 & 17. Which is what is required for the LAE instruction to set the 
ccess register of the result access register from the base access register 
when not b'0000').
 
 
 
 John McKown 
 
 Systems Engineer IV
 
 IT
 
 
 
 Administrative Services Group
 
 
 
 HealthMarkets(r)
 
 
 
 9151 Boulevard 26 * N. Richland Hills * TX 76010
 
 (817) 255-3225 phone * 
 
 john.mck...@healthmarkets.com * www.HealthMarkets.com
 
 
 
 Confidentiality Notice: This e-mail message may contain confidential or 
roprietary information. If you are not the intended recipient, please contact 
he sender by reply e-mail and destroy all copies of the original message. 
ealthMarkets(r) is the brand name for products underwritten and issued by the 
nsurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance 
ompany(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA 
ife and Health Insurance Company.SM
 
 
 
> -----Original Message-----
> From: IBM Mainframe Discussion List
> [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Micheal Butz
> Sent: Tuesday, March 06, 2012 3:00 PM
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: LAE instruction
> 
> John Mckiwns reply was a explanation of the SAC inst.    
> Which I am aware of
> 
> The Doc for LAE says the inst the functionality is dependent on PSW 
> bits
> 
> 16 17 address space control bits these are set by the SAC inst
> 
> 
> So my original question remains does
> 
> Should address space control buts be set via the sac before executing 
> the LAE
> 
> 
> Sent from my iPhone
> 
> On Mar 6, 2012, at 3:37 PM, Rob Scott <rsc...@rocketsoftware.com> 
> wrote:
> 
>> John McKown's reply covered these points very well
>> 
>> Rob Scott
>> Lead Developer
>> Rocket Software
>> 275 Grove Street * Newton, MA 02466-2272 * USA
>> Tel: +1.781.684.2305
>> Email: rsc...@rs.com
>> Web: www.rocketsoftware.com
>> 
>> 
>> -----Original Message-----
>> From: IBM Mainframe Discussion List
> [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Micheal Butz
>> Sent: 06 March 2012 19:59
>> To: IBM-MAIN@bama.ua.edu
>> Subject: Re: LAE instruction
>> 
>> Thanks
>> 
>> Regarding my questions
>> 
>> The doc says the inst is dependent
>> On address space control bits which is set by the SAC inst. 
>> 
>> Secondly seems like the displacement doesn't play a role in the inst
>> 
>> Sent from my iPhone
>> 
>> On Mar 6, 2012, at 2:49 PM, Rob Scott
> <rsc...@rocketsoftware.com> wrote:
>> 
>>>> You have coded "LAE   R3,0(R4)" - which is the same as 
> "LAE   R3,(R4,R0)"
>>> 
>>> Should read :
>>> 
>>> You have coded "LAE   R3,0(R4)" - which is the same as 
> "LAE   R3,0(R4,R0)"
>>> 
>>> Rob Scott
>>> Lead Developer
>>> Rocket Software
>>> 275 Grove Street * Newton, MA 02466-2272 * USA
>>> Tel: +1.781.684.2305
>>> Email: rsc...@rs.com
>>> Web: www.rocketsoftware.com
>>> 
>>> 
>>> -----Original Message-----
>>> From: IBM Mainframe Discussion List
> [mailto:IBM-MAIN@bama.ua.edu] On
>>> Behalf Of Rob Scott
>>> Sent: 06 March 2012 19:47
>>> To: IBM-MAIN@bama.ua.edu
>>> Subject: Re: LAE instruction
>>> 
>>> Commas are *very* important in AR-mode
>>> 
>>> You have coded "LAE   R3,0(R4)" - which is the same as 
> "LAE   R3,(R4,R0)"
>>> 
>>> Coded that way there is no automatic way that AR3 is going
> to inherit the AR4 value.
>>> 
>>> You need : "LAE   R3,0(,R4)"
>>> 
>>> This will ensure that AR3 is populated from the AR for the
> referenced base register R4.
>>> 
>>> 
>>> Rob Scott
>>> Lead Developer
>>> Rocket Software
>>> 275 Grove Street * Newton, MA 02466-2272 * USA
>>> Tel: +1.781.684.2305
>>> Email: rsc...@rs.com
>>> Web: www.rocketsoftware.com
>>> 
>>> 
>>> -----Original Message-----
>>> From: IBM Mainframe Discussion List
> [mailto:IBM-MAIN@bama.ua.edu] On
>>> Behalf Of Micheal Butz
>>> Sent: 06 March 2012 19:05
>>> To: IBM-MAIN@bama.ua.edu
>>> Subject: LAE instruction
>>> 
>>> Hi,
>>> 
>>> 
>>> 
>>> I have two part question regarding the LAE instruction
>>> 
>>> 
>>> 
>>> .         What would the sac value e.g. 256,512,768 have 
> to be that when
>>> using the LAE instructions with the following operands LAE
> 3,0(R4)
>>> would
>>> AR3 get loaded with AR4
>>> 
>>> 
>>> 
>>> .         Second what value does the displacement play in 
> the instruction
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>>               Thanks     
>>> 
>>> 
>>> 
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>> 
>> 
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> 
 
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