On Mon, 2 Jun 2014 11:47:17 -0400, John Eells wrote: >Charles Mills wrote: >> Pardon my ignorance: what exactly is a "cache line"? > >The caches are divided into 256-byte increments called "cache lines" in >current processors. > (The exact number is probably subject to change.)
Is this also the width of the data path to main memory? It would seem sensible to avoid spending cycles fetching data that would never be accessed. Does HLASM and/or STORAGE provide for cache line alignment? I've long wondered why the NIL and OIL macros are necessary to lock access to bits within a byte, whereas the hardware performs the equivalent function for bytes within a cache line. -- gil ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
