In the old days, you would check CVTBFP EQU X'10' Binary Floating Point support @MGA * (simulated unless CVTBFPH is on) @MGA
That bit is always on with OS/390 2.6 or higher. You definitely should not look at the CR0 bit. Jim Mulder z/OS Diagnosis, Design, Development, Test IBM Corp. Poughkeepsie NY IBM Mainframe Discussion List <IBM-MAIN@LISTSERV.UA.EDU> wrote on 09/26/2017 12:47:40 PM: > From: Thomas David Rivers <riv...@dignus.com> > To: IBM-MAIN@LISTSERV.UA.EDU > Date: 09/26/2017 03:29 PM > Subject: Is the AFP control bit (big #13 in CR0) testable in an application? > Sent by: IBM Mainframe Discussion List <IBM-MAIN@LISTSERV.UA.EDU> > > I was hoping to determine if a program is allowed > to use the Additional Floating Point (AFP) registers. > > There are two qualifications for this; first the "basic floating point > extensions" > has to be installed (which can be assumed after OS/390 2.6) and > second, the AFP CONTROL BIT of Control Register 0 has to be enabled > (bit #13.) > > So - while the hardware allows it, it's possible - for some reason or > other - > the control register disallows it. > > I'm looking around in the various locations (CVT, PSA, etc...) and hunting > for a mechanism where an application program can ask "Am I allowed to > use all 16 floating-pt registers, or am I restricted to the traditional 4?" > > Is there an assembler service somewhere that provides the value of control > registers? You can just use STORE CONTROL (STCTL) instruction as it is > privileged. > > - Many thanks - > - Dave Rivers - ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN