Re: [RESEND, 20/22] drm/i915/vrr: Enable Adaptive sync counter bit

[Nautiyal, Ankit K]

On 11/3/2025 11:00 AM, Mitul Golani wrote:

Add enable/disable frame counters for DC Balance odd and even
frame count calculation.

--v2:
Update commit message

--v3:
- Driver should not control adjustment enable bit, as that
is already being controlled by firmware. Release bit from
driver computation.
- Commit message update.

--v4:
- Configure PIPEDMC_EVT_CTL enable/disable call.

--v5:
- Add Adaptive sync counter enable.

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.gol...@intel.com>
---
  drivers/gpu/drm/i915/display/intel_vrr.c | 3 +++
  1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c 
b/drivers/gpu/drm/i915/display/intel_vrr.c
index 4d56a4e8c7ca..4c4dc065d3ad 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -816,6 +816,8 @@ static void intel_vrr_tg_enable(const struct 
intel_crtc_state *crtc_state,

if (crtc_state->vrr.dc_balance.enable) {

                intel_dmc_configure_dc_balance_event(display, pipe, true);
+               intel_de_write(display, 
TRANS_ADAPTIVE_SYNC_DCB_CTL(cpu_transcoder),
+                              ADAPTIVE_SYNC_COUNTER_EN);
                intel_pipedmc_dcb_enable(NULL, crtc);
        }

@@ -842,6 +844,7 @@ static void intel_vrr_tg_disable(const struct intel_crtc_state *old_crtc_state)

        if (old_crtc_state->vrr.dc_balance.enable) {
                intel_pipedmc_dcb_disable(NULL, crtc);
                intel_dmc_configure_dc_balance_event(display, pipe, false);
+               intel_de_write(display, 
TRANS_ADAPTIVE_SYNC_DCB_CTL(cpu_transcoder), 0);

This change can be part of Patch#12.


Regards,

Ankit

                intel_de_write(display, PIPEDMC_DCB_VMIN(pipe), 0);
                intel_de_write(display, PIPEDMC_DCB_VMAX(pipe), 0);
                intel_de_write(display, PIPEDMC_DCB_MAX_INCREASE(pipe), 0);