On Mon, 03 Nov 2025, Mitul Golani <[email protected]> wrote: > From: Ville Syrjälä <[email protected]> > > Add function to control DC balance enable/disable bit via DSB. > > Signed-off-by: Ville Syrjälä <[email protected]> > Signed-off-by: Mitul Golani <[email protected]> > Reviewed-by: Ankit Nautiyal <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_dmc.c | 17 +++++++++++++++++ > drivers/gpu/drm/i915/display/intel_dmc.h | 4 ++++ > 2 files changed, 21 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c > b/drivers/gpu/drm/i915/display/intel_dmc.c > index 0bddb20a7c86..3e3f4438d739 100644 > --- a/drivers/gpu/drm/i915/display/intel_dmc.c > +++ b/drivers/gpu/drm/i915/display/intel_dmc.c > @@ -1748,3 +1748,20 @@ u32 intel_pipedmc_start_mmioaddr(struct intel_crtc > *crtc) > > return dmc ? dmc->dmc_info[dmc_id].start_mmioaddr : 0; > } > + > +void intel_pipedmc_dcb_enable(struct intel_dsb *dsb, struct intel_crtc *crtc) > +{ > + struct intel_display *display = to_intel_display(crtc); > + enum pipe pipe = crtc->pipe; > + > + intel_de_write_dsb(display, dsb, PIPEDMC_DCB_CTL(pipe), > + PIPEDMC_ADAPTIVE_DCB_ENABLE); > +} > + > +void intel_pipedmc_dcb_disable(struct intel_dsb *dsb, struct intel_crtc > *crtc) > +{ > + struct intel_display *display = to_intel_display(crtc); > + enum pipe pipe = crtc->pipe; > + > + intel_de_write_dsb(display, dsb, PIPEDMC_DCB_CTL(pipe), 0); > +} > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h > b/drivers/gpu/drm/i915/display/intel_dmc.h > index 40e9dcb033cc..132d6cfc8e8b 100644 > --- a/drivers/gpu/drm/i915/display/intel_dmc.h > +++ b/drivers/gpu/drm/i915/display/intel_dmc.h > @@ -10,11 +10,13 @@ > > enum pipe; > enum pipedmc_event_id; > +struct intel_crtc; > struct drm_printer; > struct intel_crtc; > struct intel_crtc_state; > struct intel_display; > struct intel_dmc_snapshot; > +struct intel_dsb;
Please keep forward declarations sorted. > > void intel_dmc_init(struct intel_display *display); > void intel_dmc_load_program(struct intel_display *display); > @@ -39,6 +41,8 @@ void intel_dmc_update_dc6_allowed_count(struct > intel_display *display, bool star > void assert_main_dmc_loaded(struct intel_display *display); > > void intel_pipedmc_irq_handler(struct intel_display *display, enum pipe > pipe); > +void intel_pipedmc_dcb_enable(struct intel_dsb *dsb, struct intel_crtc > *crtc); > +void intel_pipedmc_dcb_disable(struct intel_dsb *dsb, struct intel_crtc > *crtc); > > u32 intel_pipedmc_start_mmioaddr(struct intel_crtc *crtc); > void intel_pipedmc_enable_event(struct intel_crtc *crtc, -- Jani Nikula, Intel
