> Subject: [PATCH v2 04/15] drm/i915/lt_phy: Drop LT PHY crtc_state for port > calculation > > Drop crtc_state from intel_lt_phy_calc_port_clock() function call and replace > it with pll state instead. Follow-up changes will call these functions > without a > crtc_state available. > > Signed-off-by: Mika Kahola <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 4 +++- > drivers/gpu/drm/i915/display/intel_dpll.c | 3 ++- > drivers/gpu/drm/i915/display/intel_lt_phy.c | 19 ++++++++----------- > drivers/gpu/drm/i915/display/intel_lt_phy.h | 4 ++-- > 4 files changed, 15 insertions(+), 15 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c > b/drivers/gpu/drm/i915/display/intel_ddi.c > index cb91d07cdaa6..d8739e2bb004 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -4247,13 +4247,15 @@ void intel_ddi_get_clock(struct intel_encoder > *encoder, static void xe3plpd_ddi_get_config(struct intel_encoder *encoder, > struct intel_crtc_state *crtc_state) { > + struct intel_display *display = to_intel_display(encoder); > + > intel_lt_phy_pll_readout_hw_state(encoder, crtc_state, &crtc_state- > >dpll_hw_state.ltpll); > > if (crtc_state->dpll_hw_state.ltpll.tbt_mode) > crtc_state->port_clock = > intel_mtl_tbt_calc_port_clock(encoder); > else > crtc_state->port_clock = > - intel_lt_phy_calc_port_clock(encoder, crtc_state); > + intel_lt_phy_calc_port_clock(display, > +&crtc_state->dpll_hw_state.ltpll); > intel_ddi_get_config(encoder, crtc_state); } > > diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c > b/drivers/gpu/drm/i915/display/intel_dpll.c > index a4f372c9e6fc..1b5b18fa0a36 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll.c > +++ b/drivers/gpu/drm/i915/display/intel_dpll.c > @@ -1219,6 +1219,7 @@ static int xe3plpd_crtc_compute_clock(struct > intel_atomic_state *state, > intel_atomic_get_new_crtc_state(state, crtc); > struct intel_encoder *encoder = > intel_get_crtc_new_encoder(state, crtc_state); > + struct intel_display *display = to_intel_display(encoder); > int ret; > > ret = intel_lt_phy_pll_calc_state(crtc_state, encoder); @@ -1227,7 > +1228,7 @@ static int xe3plpd_crtc_compute_clock(struct intel_atomic_state > *state, > > /* TODO: Do the readback via intel_compute_shared_dplls() */ > crtc_state->port_clock = > - intel_lt_phy_calc_port_clock(encoder, crtc_state); > + intel_lt_phy_calc_port_clock(display, > +&crtc_state->dpll_hw_state.ltpll); > > crtc_state->hw.adjusted_mode.crtc_clock = > intel_crtc_dotclock(crtc_state); > > diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c > b/drivers/gpu/drm/i915/display/intel_lt_phy.c > index 939c8975fd4c..74b0bc90c959 100644 > --- a/drivers/gpu/drm/i915/display/intel_lt_phy.c > +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c > @@ -1679,7 +1679,8 @@ intel_lt_phy_calculate_hdmi_state(struct > intel_lt_phy_pll_state *lt_state, } > > static int > -intel_lt_phy_calc_hdmi_port_clock(const struct intel_crtc_state *crtc_state) > +intel_lt_phy_calc_hdmi_port_clock(struct intel_display *display, > + const struct intel_lt_phy_pll_state *lt_state) > { > #define REGVAL(i) ( \ > (lt_state->data[i][3]) | \ > @@ -1688,9 +1689,6 @@ intel_lt_phy_calc_hdmi_port_clock(const struct > intel_crtc_state *crtc_state) > (lt_state->data[i][0] << 24) \ > ) > > - struct intel_display *display = to_intel_display(crtc_state); > - const struct intel_lt_phy_pll_state *lt_state = > - &crtc_state->dpll_hw_state.ltpll; > int clk = 0; > u32 d8, pll_reg_5, pll_reg_3, pll_reg_57, m2div_frac, m2div_int; > u64 temp0, temp1; > @@ -1748,12 +1746,10 @@ intel_lt_phy_calc_hdmi_port_clock(const struct > intel_crtc_state *crtc_state) } > > int > -intel_lt_phy_calc_port_clock(struct intel_encoder *encoder, > - const struct intel_crtc_state *crtc_state) > +intel_lt_phy_calc_port_clock(struct intel_display *display, > + const struct intel_lt_phy_pll_state *lt_state) > { > int clk; > - const struct intel_lt_phy_pll_state *lt_state = > - &crtc_state->dpll_hw_state.ltpll; > u8 mode, rate; > > mode = REG_FIELD_GET8(LT_PHY_VDR_MODE_ENCODING_MASK, > @@ -1769,7 +1765,7 @@ intel_lt_phy_calc_port_clock(struct intel_encoder > *encoder, > lt_state->config[0]); > clk = intel_lt_phy_get_dp_clock(rate); > } else { > - clk = intel_lt_phy_calc_hdmi_port_clock(crtc_state); > + clk = intel_lt_phy_calc_hdmi_port_clock(display, lt_state); > } > > return clk; > @@ -2220,6 +2216,7 @@ void intel_lt_phy_pll_readout_hw_state(struct > intel_encoder *encoder, > const struct intel_crtc_state > *crtc_state, > struct intel_lt_phy_pll_state > *pll_state) { > + struct intel_display *display = to_intel_display(encoder); > u8 owned_lane_mask; > u8 lane; > struct ref_tracker *wakeref; > @@ -2245,7 +2242,7 @@ void intel_lt_phy_pll_readout_hw_state(struct > intel_encoder *encoder, > } > > pll_state->clock = > - intel_lt_phy_calc_port_clock(encoder, crtc_state); > + intel_lt_phy_calc_port_clock(display, > +&crtc_state->dpll_hw_state.ltpll);
Readout_hw_state already has pll_state maybe you can directly pass that instead of what's inside crtc_state Since by this point we would have read and dumped everything inside pll_state anyways. Regards, Suraj Kandpal > intel_lt_phy_transaction_end(encoder, wakeref); } > > @@ -2275,7 +2272,7 @@ void intel_lt_phy_pll_state_verify(struct > intel_atomic_state *state, > > encoder = intel_get_crtc_new_encoder(state, new_crtc_state); > intel_lt_phy_pll_readout_hw_state(encoder, new_crtc_state, > &pll_hw_state); > - clock = intel_lt_phy_calc_port_clock(encoder, new_crtc_state); > + clock = intel_lt_phy_calc_port_clock(display, > +&new_crtc_state->dpll_hw_state.ltpll); > > dig_port = enc_to_dig_port(encoder); > if (intel_tc_port_in_tbt_alt_mode(dig_port)) > diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.h > b/drivers/gpu/drm/i915/display/intel_lt_phy.h > index 7659c92b6c3c..c4999a55473e 100644 > --- a/drivers/gpu/drm/i915/display/intel_lt_phy.h > +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.h > @@ -21,8 +21,8 @@ void intel_lt_phy_pll_disable(struct intel_encoder > *encoder); int intel_lt_phy_pll_calc_state(struct intel_crtc_state > *crtc_state, > struct intel_encoder *encoder); > -int intel_lt_phy_calc_port_clock(struct intel_encoder *encoder, > - const struct intel_crtc_state *crtc_state); > +int intel_lt_phy_calc_port_clock(struct intel_display *display, > + const struct intel_lt_phy_pll_state *lt_state); > void intel_lt_phy_set_signal_levels(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state); > void intel_lt_phy_dump_hw_state(struct intel_display *display, > -- > 2.34.1
