> Subject: [PATCH v2 05/15] drm/i915/cx0: Drop encoder from port clock > calculation > > For C10 and C20 we have unused encoder parameter passed to port clock > calculation function. Remove encoder from passing it to port clock calculation > function. >
Sounds awkward maybe "Remove the encoder from being passed to the port clock calculation function." Other than that, LGTM, Reviewed-by: Suraj Kandpal <[email protected]> > Signed-off-by: Mika Kahola <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_cx0_phy.c | 14 ++++++-------- > 1 file changed, 6 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c > b/drivers/gpu/drm/i915/display/intel_cx0_phy.c > index 664c48dc0ce3..b7ac89e32586 100644 > --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c > +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c > @@ -2103,8 +2103,7 @@ static bool cx0pll_state_is_dp(const struct > intel_cx0pll_state *pll_state) > return c20pll_state_is_dp(&pll_state->c20); > } > > -static int intel_c10pll_calc_port_clock(struct intel_encoder *encoder, > - const struct intel_c10pll_state > *pll_state) > +static int intel_c10pll_calc_port_clock(const struct intel_c10pll_state > +*pll_state) > { > unsigned int frac_quot = 0, frac_rem = 0, frac_den = 1; > unsigned int multiplier, tx_clk_div, hdmi_div, refclk = 38400; @@ - > 2135,8 +2134,7 @@ static bool intel_c20phy_use_mpllb(const struct > intel_c20pll_state *state) > return state->tx[0] & C20_PHY_USE_MPLLB; } > > -static int intel_c20pll_calc_port_clock(struct intel_encoder *encoder, > - const struct intel_c20pll_state > *pll_state) > +static int intel_c20pll_calc_port_clock(const struct intel_c20pll_state > +*pll_state) > { > unsigned int frac, frac_en, frac_quot, frac_rem, frac_den; > unsigned int multiplier, refclk = 38400; @@ -2325,7 +2323,7 @@ > static void intel_c10pll_readout_hw_state(struct intel_encoder *encoder, > > intel_cx0_phy_transaction_end(encoder, wakeref); > > - pll_state->clock = intel_c10pll_calc_port_clock(encoder, pll_state); > + pll_state->clock = intel_c10pll_calc_port_clock(pll_state); > > cx0pll_state->ssc_enabled = readout_ssc_state(encoder, true); > > @@ -2821,7 +2819,7 @@ static void intel_c20pll_readout_hw_state(struct > intel_encoder *encoder, > } > } > > - pll_state->clock = intel_c20pll_calc_port_clock(encoder, pll_state); > + pll_state->clock = intel_c20pll_calc_port_clock(pll_state); > > intel_cx0_phy_transaction_end(encoder, wakeref); > > @@ -3713,9 +3711,9 @@ int intel_cx0pll_calc_port_clock(struct > intel_encoder *encoder, > const struct intel_cx0pll_state *pll_state) { > if (intel_encoder_is_c10phy(encoder)) > - return intel_c10pll_calc_port_clock(encoder, &pll_state- > >c10); > + return intel_c10pll_calc_port_clock(&pll_state->c10); > > - return intel_c20pll_calc_port_clock(encoder, &pll_state->c20); > + return intel_c20pll_calc_port_clock(&pll_state->c20); > } > > /* > -- > 2.34.1
