Add intel_dp_pixel_rate_fits_dotclk() helper, that checks the
required pixel rate against platform dotclock limit.
With joined pipes the effective dotclock limit depends upon the number
of joined pipes.

Call the helper from the mode_valid phase and from the compute_config
phase where we need to check the limits for the given target clock for a
given joiner candidate.

v2: Rename the helper to intel_dp_dotclk_valid(). (Imre)

Signed-off-by: Ankit Nautiyal <[email protected]>
---
 drivers/gpu/drm/i915/display/intel_dp.c     | 23 ++++++++++++++++-----
 drivers/gpu/drm/i915/display/intel_dp.h     |  3 +++
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 14 ++++++-------
 3 files changed, 27 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 9bbd37ebd2ea..655688c8e6ef 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1449,6 +1449,18 @@ bool intel_dp_can_join(struct intel_display *display,
        }
 }
 
+bool intel_dp_dotclk_valid(struct intel_display *display,
+                          int target_clock,
+                          int num_joined_pipes)
+{
+       int max_dotclk = display->cdclk.max_dotclk_freq;
+       int effective_dotclk_limit;
+
+       effective_dotclk_limit = max_dotclk * num_joined_pipes;
+
+       return target_clock <= effective_dotclk_limit;
+}
+
 static enum drm_mode_status
 intel_dp_mode_valid(struct drm_connector *_connector,
                    const struct drm_display_mode *mode)
@@ -1511,7 +1523,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
         * over candidate pipe counts and evaluate each combination.
         */
        for (num_pipes = 0; num_pipes < I915_MAX_PIPES; num_pipes++) {
-               int max_dotclk = display->cdclk.max_dotclk_freq;
 
                status = MODE_CLOCK_HIGH;
 
@@ -1582,9 +1593,9 @@ intel_dp_mode_valid(struct drm_connector *_connector,
                if (status != MODE_OK)
                        continue;
 
-               max_dotclk *= num_joined_pipes;
-
-               if (target_clock <= max_dotclk) {
+               if (intel_dp_dotclk_valid(display,
+                                         target_clock,
+                                         num_joined_pipes)) {
                        status = MODE_OK;
                        break;
                }
@@ -2870,7 +2881,9 @@ intel_dp_compute_link_for_joined_pipes(struct 
intel_encoder *encoder,
 
        max_dotclk *= num_joined_pipes;
 
-       if (adjusted_mode->crtc_clock > max_dotclk)
+       if (!intel_dp_dotclk_valid(display,
+                                  adjusted_mode->crtc_clock,
+                                  num_joined_pipes))
                return -EINVAL;
 
        drm_dbg_kms(display->drm,
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h 
b/drivers/gpu/drm/i915/display/intel_dp.h
index 6d409c1998c9..78fa8eaba4ac 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -228,5 +228,8 @@ int intel_dp_sdp_min_guardband(const struct 
intel_crtc_state *crtc_state,
 int intel_dp_max_hdisplay_per_pipe(struct intel_display *display);
 bool intel_dp_can_join(struct intel_display *display,
                       int num_joined_pipes);
+bool intel_dp_dotclk_valid(struct intel_display *display,
+                          int target_clock,
+                          int num_joined_pipes);
 
 #endif /* __INTEL_DP_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c 
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 7a83af89ef03..f433a01dcfcb 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -702,7 +702,6 @@ static int mst_stream_compute_config(struct intel_encoder 
*encoder,
        pipe_config->has_pch_encoder = false;
 
        for (num_pipes = 0; num_pipes < I915_MAX_PIPES; num_pipes++) {
-               int max_dotclk = display->cdclk.max_dotclk_freq;
 
                ret = -EINVAL;
 
@@ -732,9 +731,9 @@ static int mst_stream_compute_config(struct intel_encoder 
*encoder,
                if (ret)
                        continue;
 
-               max_dotclk *= num_joined_pipes;
-
-               if (adjusted_mode->clock <= max_dotclk) {
+               if (intel_dp_dotclk_valid(display,
+                                         adjusted_mode->clock,
+                                         num_joined_pipes)) {
                        ret = 0;
                        break;
                }
@@ -1532,7 +1531,6 @@ mst_connector_mode_valid_ctx(struct drm_connector 
*_connector,
        }
 
        for (num_pipes = 0; num_pipes < I915_MAX_PIPES; num_pipes++) {
-               int max_dotclk = display->cdclk.max_dotclk_freq;
 
                *status = MODE_CLOCK_HIGH;
 
@@ -1580,9 +1578,9 @@ mst_connector_mode_valid_ctx(struct drm_connector 
*_connector,
                if (*status != MODE_OK)
                        continue;
 
-               max_dotclk *= num_joined_pipes;
-
-               if (mode->clock <= max_dotclk) {
+               if (intel_dp_dotclk_valid(display,
+                                         mode->clock,
+                                         num_joined_pipes)) {
                        *status = MODE_OK;
                        break;
                }
-- 
2.45.2

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