On Wed, Jan 28, 2026 at 07:36:35PM +0530, Ankit Nautiyal wrote: > From: Chaitanya Kumar Borah <[email protected]> > > Add upper limit check for pixel clock for DISPLAY_VER >= 30. > Limits don't apply when DSC is enabled. > > The helper returns the upper limit for the platforms, capped to the > max dotclock (khz). > > For the currently supported versions of HDMI, pixel clock is already > limited to 600Mhz so nothing needs to be done there as of now. > > v2: > - Add this limit to the new helper. > v3: > - Rename helper to intel_max_uncompressed_dotclock(). (Imre) > - Limit only for PTL and cap the limit to max_dotclock. (Imre) > > BSpec: 49199, 68912 > Signed-off-by: Chaitanya Kumar Borah <[email protected]> > Signed-off-by: Ankit Nautiyal <[email protected]>
Reviewed-by: Imre Deak <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_display.c | 11 +++++++++++ > drivers/gpu/drm/i915/display/intel_display.h | 1 + > drivers/gpu/drm/i915/display/intel_dp.c | 3 +++ > 3 files changed, 15 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > b/drivers/gpu/drm/i915/display/intel_display.c > index 7491e00e3858..9cfeb5530fd8 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -8001,6 +8001,17 @@ void intel_setup_outputs(struct intel_display *display) > drm_helper_move_panel_connectors_to_head(display->drm); > } > > +int intel_max_uncompressed_dotclock(struct intel_display *display) > +{ > + int max_dotclock = display->cdclk.max_dotclk_freq; > + int limit = max_dotclock; > + > + if (DISPLAY_VER(display) >= 30) > + limit = 1350000; > + > + return min(max_dotclock, limit); > +} > + > static int max_dotclock(struct intel_display *display) > { > int max_dotclock = display->cdclk.max_dotclk_freq; > diff --git a/drivers/gpu/drm/i915/display/intel_display.h > b/drivers/gpu/drm/i915/display/intel_display.h > index f8e6e4e82722..0e9192da601d 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.h > +++ b/drivers/gpu/drm/i915/display/intel_display.h > @@ -488,6 +488,7 @@ void intel_cpu_transcoder_get_m2_n2(struct intel_crtc > *crtc, > struct intel_link_m_n *m_n); > int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n > *m_n); > int intel_crtc_dotclock(const struct intel_crtc_state *pipe_config); > +int intel_max_uncompressed_dotclock(struct intel_display *display); > enum intel_display_power_domain intel_port_to_power_domain(struct > intel_digital_port *dig_port); > enum intel_display_power_domain > intel_aux_power_domain(struct intel_digital_port *dig_port); > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index 9eba8f90bc90..6584e28ab2fe 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -1465,6 +1465,9 @@ bool intel_dp_dotclk_valid(struct intel_display > *display, > > target_clock, > htotal, > > dsc_slice_count); > + else > + effective_dotclk_limit = > + intel_max_uncompressed_dotclock(display) * > num_joined_pipes; > > return target_clock <= effective_dotclk_limit; > } > -- > 2.45.2 >
