From: Chaitanya Kumar Borah <[email protected]> Add upper limit check for pixel clock for WCL and pre PTL platforms.
BSpec: 49199, 68912 Signed-off-by: Chaitanya Kumar Borah <[email protected]> Signed-off-by: Ankit Nautiyal <[email protected]> --- drivers/gpu/drm/i915/display/intel_display.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 9cfeb5530fd8..2cd950b57918 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -8006,8 +8006,14 @@ int intel_max_uncompressed_dotclock(struct intel_display *display) int max_dotclock = display->cdclk.max_dotclk_freq; int limit = max_dotclock; - if (DISPLAY_VER(display) >= 30) + if (DISPLAY_VERx100(display) == 3002) + limit = 937500; + else if (DISPLAY_VER(display) >= 30) limit = 1350000; + else if (DISPLAY_VER(display) >= 13) + limit = 1200000; + else + limit = 1100000; return min(max_dotclock, limit); } -- 2.45.2
