Hi
I was trying to Run jailhouse on two board i.e OrangePi PC2 and Quad core
A35/A72 based SoC.
I am able run Jailhouse on OrangePI PC2 and ran simple application on single
core which blinks the LED which works fine on OrangePI PC2 board.
But I have problem running Jailhouse on other board which has A35 and A72.
I got following crash when enable Jailhouse on this board,
Initializing Jailhouse hypervisor v0.8 (9-g5eec601-dirty) on CPU 0
Code location: 0x0000ffffc0200060
Page pool usage after early setup: mem 61/16356, remap 48/131072
Initializing processors:
CPU 0... OK
CPU 1... OK
CPU 2... OK
Adding virtual PCI device 00:00.0 to cell "Dione"
Page pool usage after late setup: mem 66/16356, remap 53/131072
FATAL: instruction abort at 0x40ebdee8
FATAL: unhandled trap (exception class 0x20)
Cell state before exception:
pc: ffffff80008f0ee8 lr: ffffff80008f0ee8 spsr: 600001c5 EL1
sp: ffffffc02f003bb0 esr: 20 1 0000086
x0: 0000000000000000 x1: 0000000000000000 x2: 0000000000000000
x3: 0000000000000000 x4: 0000000000000000 x5: 0000000000000000
x6: 0000000000000000 x7: 0000000000000000 x8: 0000000000000000
x9: 0000000000000000 x10: 0000000000000000 x11: 0000000000000000
x12: 0000000000000000 x13: 0000000000000000 x14: 0000000000000000
x15: 0000000000000000 x16: 0000000000000000 x17: 0000000000000000
x18: 0000000000000000 x19: ffffff80008f4910 x20: ffffff8010000000
x21: ffffff8010000000 x22: 0000000000000000 x23: 0000000000000140
x24: ffffff80008f4600 x25: ffffff8008d26de0 x26: ffffff8010000000
x27: 00000000000002c4 x28: ffffffc02f000000 x29: ffffffc02f003bb0
Parking CPU 2 (Cell: "XXXXX")
It generate exception at 0x40ebdee8 which is DDR address.
I have mentioned DDR range including above address in to the root-cell
configuration like this,
/* RAM */ {
.phys_start = 0x40000000,
.virt_start = 0x40000000,
.size = 0x02FFFFFF,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
Can anyone help me to figure out what is the problem or how to debug and
resolve this issue?
Thanks,
Bharat
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