Hi Jan, Already tried this configuration(pl check attached config file) and I had also removed shared memory and PCI device but result are same, Initializing Jailhouse hypervisor v0.8 (9-g5eec601-dirty) on CPU 2 Code location: 0x0000ffffc0200060 Page pool usage after early setup: mem 61/16356, remap 48/131072 Initializing processors: CPU 2... OK CPU 0... OK CPU 1... OK Adding virtual PCI device 00:00.0 to cell "XXXXX" Page pool usage after late setup: mem 66/16356, remap 53/131072 FATAL: instruction abort at 0x40f44ee8
FATAL: unhandled trap (exception class 0x20) Cell state before exception: pc: ffffff8000940ee8 lr: ffffff8000940ee8 spsr: 600001c5 EL1 sp: ffffffc03be75f90 esr: 20 1 0000084 x0: 0000000000000000 x1: 0000000000000000 x2: 0000000000000000 x3: 0000000000000000 x4: 0000000000000000 x5: 0000000000000000 x6: 0000000000000000 x7: 0000000000000000 x8: 0000000000000000 x9: 0000000000000000 x10: 0000000000000000 x11: 0000000000000000 x12: 0000000000000000 x13: 0000000000000000 x14: 0000000000000000 x15: 0000000000000000 x16: 0000000000000000 x17: 0000000000000000 x18: 0000000000000000 x19: ffffff8000944910 x20: ffffff8010000000 x21: 0000000000000000 x22: 0000000000000001 x23: 0000000000000001 x24: 0000000000000004 x25: ffffffc03be720a0 x26: ffffffc03be76090 x27: ffffff8008d97000 x28: ffffffc0031e0000 x29: ffffffc03be75f90 On Mon, Feb 12, 2018 at 3:28 PM, Jan Kiszka <jan.kis...@siemens.com> wrote: > On 2018-02-12 10:18, Henning Schild wrote: > > Am Mon, 12 Feb 2018 14:38:29 +0530 > > schrieb bharat gohil <ghl.b...@gmail.com>: > > > >> Hi Jan, > >> > >> I had modified root cell configuration as per your suggestion. > >> I got following error, > >> > >> Adding virtual PCI device 00:00.0 to cell "XXXXX" > >> /media/bgohil/data_ssd/virtualization/jailhouse/ > hypervisor/ivshmem.c:330: > >> returning error -EINVAL > >> JAILHOUSE_ENABLE: Invalid argument > > > > You specified 7 memory regions and the array just has 6 entries, you > > One is commented out, 6 is correct. > > shmem_region is wrong: 5 is the last index in mem-regions. > > Jan > > > most likely even got a compiler warning about that. > > Now your index 6 is out of the array, have a look at > > hypervisor/ivshmem.c:330. > > > > Henning > > > >> Please find attached cell configuration file > >> Thanks, > >> Bharat > >> > >> On Mon, Feb 12, 2018 at 12:35 PM, Jan Kiszka <jan.kis...@web.de> > >> wrote: > >> > >>> On 2018-02-12 05:53, bharat gohil wrote: > >>>> Hello Jan, > >>>> > >>>> Please find attached root cell config file. > >>> > >>>> /* > >>>> * Jailhouse, a Linux-based partitioning hypervisor > >>>> * > >>>> * Test configuration for XXXXX (2-Cortex-A72, 4-Cortex-A35, 2GB > >>>> RAM) * > >>>> * Copyright (c) Siemens AG, 2014-2016 > >>>> * > >>>> * Authors: > >>>> * Jan Kiszka <jan.kis...@siemens.com> > >>>> * > >>>> * This work is licensed under the terms of the GNU GPL, version > >>>> 2. See > >>>> * the COPYING file in the top-level directory. > >>>> */ > >>>> > >>>> #include <jailhouse/types.h> > >>>> #include <jailhouse/cell-config.h> > >>>> > >>>> #define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0]) > >>>> > >>>> struct { > >>>> struct jailhouse_system header; > >>>> __u64 cpus[1]; > >>>> struct jailhouse_memory mem_regions[8]; > >>> > >>> You are preparing for 8 regions here, but only 6 are initialized > >>> below. First thing to fix. > >>> > >>>> struct jailhouse_irqchip irqchips[1]; > >>>> struct jailhouse_pci_device pci_devices[1]; > >>>> } __attribute__((packed)) config = { > >>>> .header = { > >>>> .signature = JAILHOUSE_SYSTEM_SIGNATURE, > >>>> .revision = JAILHOUSE_CONFIG_REVISION, > >>>> .hypervisor_memory = { > >>>> .phys_start = 0x7C000000, > >>>> .size = 0x4000000, > >>>> }, > >>>> .debug_console = { > >>>> .address = 0x11002000, > >>>> .size = 0x1000, > >>>> .flags = JAILHOUSE_CON1_TYPE_8250 | > >>>> JAILHOUSE_CON1_ACCESS_MMIO | > >>>> JAILHOUSE_CON1_REGDIST_4 | > >>>> JAILHOUSE_CON2_TYPE_ROOTPAGE, > >>>> }, > >>>> .platform_info = { > >>>> .pci_mmconfig_base = 0x2000000, > >>>> .pci_mmconfig_end_bus = 0, > >>>> .pci_is_virtual = 1, > >>>> .arm = { > >>>> .gic_version = 2, > >>>> .gicd_base = 0x10510000, > >>>> .gicc_base = 0x10520000, > >>>> .gich_base = 0x10540000, > >>>> .gicv_base = 0x10560000, > >>>> .maintenance_irq = 25, > >>>> }, > >>>> }, > >>>> .root_cell = { > >>>> .name = "XXXXX", > >>>> > >>>> .cpu_set_size = sizeof(config.cpus), > >>>> .num_memory_regions = > >>> ARRAY_SIZE(config.mem_regions), > >>>> .num_irqchips = ARRAY_SIZE(config.irqchips), > >>>> .num_pci_devices = > >>>> ARRAY_SIZE(config.pci_devices), > >>>> > >>>> .vpci_irq_base = 108, > >>>> }, > >>>> }, > >>>> > >>>> .cpus = { > >>>> 0x3F, > >>>> }, > >>>> > >>>> .mem_regions = { > >>>> /* CCU */ { > >>>> .phys_start = 0x10000000, > >>>> .virt_start = 0x10000000, > >>>> .size = 0x2000000, > >>>> .flags = JAILHOUSE_MEM_READ | > >>> JAILHOUSE_MEM_WRITE | > >>>> JAILHOUSE_MEM_IO | > >>>> JAILHOUSE_MEM_IO_32, }, > >>>> /* MMIO 1 (permissive) */ { > >>>> .phys_start = 0x13000000, > >>>> .virt_start = 0x13000000, > >>>> .size = 0x4000000, > >>>> .flags = JAILHOUSE_MEM_READ | > >>>> JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, > >>>> }, > >>>> /* pinctrl PA */ { > >>>> .phys_start = 0x18000000, > >>>> .virt_start = 0x18000000, > >>>> .size = 0x2000000, > >>>> .flags = JAILHOUSE_MEM_READ | > >>>> JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32, > >>>> }, > >>>> /* RAM */ { > >>>> .phys_start = 0x40000000, > >>>> .virt_start = 0x40000000, > >>>> .size = 0x02FFFFFF, > >>> > >>> This switches the region in to sub-page mode, and that may cause > >>> this surprising behavior. Just do size + 1, as it is correct. > >>> > >>>> .flags = JAILHOUSE_MEM_READ | > >>>> JAILHOUSE_MEM_WRITE > >>> | JAILHOUSE_MEM_EXECUTE, > >>>> }, > >>>> /* RAM*/ /*{ > >>>> .phys_start = 0x40EC0000, > >>>> .virt_start = 0x40EC0000, > >>>> .size = 0x0213FFFF, > >>>> .flags = JAILHOUSE_MEM_READ | > >>> JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, > >>>> },*/ > >>>> /**THIS HOLE FOR ARM TRUSTED FIRMWARE**/ > >>>> > >>>> /* RAM*/ { > >>>> .phys_start = 0x43040000, > >>>> .virt_start = 0x43040000, > >>>> .size = 0x38EC0000, > >>>> .flags = JAILHOUSE_MEM_READ | > >>> JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, > >>>> }, > >>>> > >>>> /* IVSHMEM shared memory region */ { > >>>> .phys_start = 0x7BF00000, > >>>> .virt_start = 0x7BF00000, > >>>> .size = 0x100000, > >>>> .flags = JAILHOUSE_MEM_READ | > >>>> JAILHOUSE_MEM_WRITE, }, > >>>> }, > >>>> > >>>> .irqchips = { > >>>> /* GIC */ { > >>>> .address = 0x10510000, > >>>> .pin_base = 32, > >>>> .pin_bitmap = { > >>>> 0xffffffff, 0xffffffff, > >>>> 0xffffffff, > >>> 0xffffffff > >>>> }, > >>>> }, > >>>> }, > >>>> > >>>> .pci_devices = { > >>>> { > >>>> .type = JAILHOUSE_PCI_TYPE_IVSHMEM, > >>>> .bdf = 0x00, > >>>> .bar_mask = { > >>>> 0xffffff00, 0xffffffff, 0x00000000, > >>>> 0x00000000, 0x00000000, 0x00000000, > >>>> }, > >>>> .shmem_region = 7, > >>> > >>> Keep this up-to-date when disabling a region. Should be 6 now. > >>> > >>>> .shmem_protocol = > >>>> JAILHOUSE_SHMEM_PROTO_VETH, }, > >>>> }, > >>>> }; > >>>> > >>> > >>> Jan > >>> > >> > >> > >> > > > > -- > Siemens AG, Corporate Technology, CT RDA IOT SES-DE > Corporate Competence Center Embedded Linux > -- Regards, Bharat Gohil Sr.Software Engineer bharat.go...@harman.com +919427054633 -- You received this message because you are subscribed to the Google Groups "Jailhouse" group. To unsubscribe from this group and stop receiving emails from it, send an email to jailhouse-dev+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
/* * Jailhouse, a Linux-based partitioning hypervisor * * Test configuration for XXXXX (2-Cortex-A72, 4-Cortex-A35, 2GB RAM) * * Copyright (c) Siemens AG, 2014-2016 * * Authors: * Jan Kiszka <jan.kis...@siemens.com> * * This work is licensed under the terms of the GNU GPL, version 2. See * the COPYING file in the top-level directory. */ #include <jailhouse/types.h> #include <jailhouse/cell-config.h> #define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0]) struct { struct jailhouse_system header; __u64 cpus[1]; struct jailhouse_memory mem_regions[6]; struct jailhouse_irqchip irqchips[1]; struct jailhouse_pci_device pci_devices[1]; } __attribute__((packed)) config = { .header = { .signature = JAILHOUSE_SYSTEM_SIGNATURE, .revision = JAILHOUSE_CONFIG_REVISION, .hypervisor_memory = { .phys_start = 0x7C000000, .size = 0x4000000, }, .debug_console = { .address = 0x11002000, .size = 0x1000, .flags = JAILHOUSE_CON1_TYPE_8250 | JAILHOUSE_CON1_ACCESS_MMIO | JAILHOUSE_CON1_REGDIST_4 | JAILHOUSE_CON2_TYPE_ROOTPAGE, }, .platform_info = { .pci_mmconfig_base = 0x2000000, .pci_mmconfig_end_bus = 0, .pci_is_virtual = 1, .arm = { .gic_version = 2, .gicd_base = 0x10510000, .gicc_base = 0x10520000, .gich_base = 0x10540000, .gicv_base = 0x10560000, .maintenance_irq = 25, }, }, .root_cell = { .name = "XXXXX", .cpu_set_size = sizeof(config.cpus), .num_memory_regions = ARRAY_SIZE(config.mem_regions), .num_irqchips = ARRAY_SIZE(config.irqchips), .num_pci_devices = ARRAY_SIZE(config.pci_devices), .vpci_irq_base = 108, }, }, .cpus = { 0x7, }, .mem_regions = { /* CCU */ { .phys_start = 0x10000000, .virt_start = 0x10000000, .size = 0x2000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32, }, /* MMIO 1 (permissive) */ { .phys_start = 0x13000000, .virt_start = 0x13000000, .size = 0x4000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* pinctrl PA */ { .phys_start = 0x18000000, .virt_start = 0x18000000, .size = 0x2000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32, }, /* RAM */ { .phys_start = 0x40000000, .virt_start = 0x40000000, .size = 0x03000000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* RAM*/ /*{ .phys_start = 0x40EC0000, .virt_start = 0x40EC0000, .size = 0x0213FFFF, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, },*/ /**THIS HOLE FOR ARM TRUSTED FIRMWARE**/ /* RAM*/ { .phys_start = 0x43040000, .virt_start = 0x43040000, .size = 0x38EC0000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE, }, /* IVSHMEM shared memory region */ { .phys_start = 0x7BF00000, .virt_start = 0x7BF00000, .size = 0x100000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE, }, }, .irqchips = { /* GIC */ { .address = 0x10510000, .pin_base = 32, .pin_bitmap = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff }, }, }, .pci_devices = { { .type = JAILHOUSE_PCI_TYPE_IVSHMEM, .bdf = 0x00, .bar_mask = { 0xffffff00, 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }, .shmem_region = 5, .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH, }, }, };