On 2018-02-12 05:53, bharat gohil wrote:
> Hello Jan,
>
> Please find attached root cell config file.
> /*
> * Jailhouse, a Linux-based partitioning hypervisor
> *
> * Test configuration for XXXXX (2-Cortex-A72, 4-Cortex-A35, 2GB RAM)
> *
> * Copyright (c) Siemens AG, 2014-2016
> *
> * Authors:
> * Jan Kiszka <jan.kis...@siemens.com>
> *
> * This work is licensed under the terms of the GNU GPL, version 2. See
> * the COPYING file in the top-level directory.
> */
>
> #include <jailhouse/types.h>
> #include <jailhouse/cell-config.h>
>
> #define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0])
>
> struct {
> struct jailhouse_system header;
> __u64 cpus[1];
> struct jailhouse_memory mem_regions[8];
You are preparing for 8 regions here, but only 6 are initialized below.
First thing to fix.
> struct jailhouse_irqchip irqchips[1];
> struct jailhouse_pci_device pci_devices[1];
> } __attribute__((packed)) config = {
> .header = {
> .signature = JAILHOUSE_SYSTEM_SIGNATURE,
> .revision = JAILHOUSE_CONFIG_REVISION,
> .hypervisor_memory = {
> .phys_start = 0x7C000000,
> .size = 0x4000000,
> },
> .debug_console = {
> .address = 0x11002000,
> .size = 0x1000,
> .flags = JAILHOUSE_CON1_TYPE_8250 |
> JAILHOUSE_CON1_ACCESS_MMIO |
> JAILHOUSE_CON1_REGDIST_4 |
> JAILHOUSE_CON2_TYPE_ROOTPAGE,
> },
> .platform_info = {
> .pci_mmconfig_base = 0x2000000,
> .pci_mmconfig_end_bus = 0,
> .pci_is_virtual = 1,
> .arm = {
> .gic_version = 2,
> .gicd_base = 0x10510000,
> .gicc_base = 0x10520000,
> .gich_base = 0x10540000,
> .gicv_base = 0x10560000,
> .maintenance_irq = 25,
> },
> },
> .root_cell = {
> .name = "XXXXX",
>
> .cpu_set_size = sizeof(config.cpus),
> .num_memory_regions = ARRAY_SIZE(config.mem_regions),
> .num_irqchips = ARRAY_SIZE(config.irqchips),
> .num_pci_devices = ARRAY_SIZE(config.pci_devices),
>
> .vpci_irq_base = 108,
> },
> },
>
> .cpus = {
> 0x3F,
> },
>
> .mem_regions = {
> /* CCU */ {
> .phys_start = 0x10000000,
> .virt_start = 0x10000000,
> .size = 0x2000000,
> .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
> JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
> },
> /* MMIO 1 (permissive) */ {
> .phys_start = 0x13000000,
> .virt_start = 0x13000000,
> .size = 0x4000000,
> .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
> JAILHOUSE_MEM_IO,
> },
> /* pinctrl PA */ {
> .phys_start = 0x18000000,
> .virt_start = 0x18000000,
> .size = 0x2000000,
> .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
> JAILHOUSE_MEM_IO | JAILHOUSE_MEM_IO_32,
> },
> /* RAM */ {
> .phys_start = 0x40000000,
> .virt_start = 0x40000000,
> .size = 0x02FFFFFF,
This switches the region in to sub-page mode, and that may cause this
surprising behavior. Just do size + 1, as it is correct.
> .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
> JAILHOUSE_MEM_EXECUTE,
> },
> /* RAM*/ /*{
> .phys_start = 0x40EC0000,
> .virt_start = 0x40EC0000,
> .size = 0x0213FFFF,
> .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
> JAILHOUSE_MEM_EXECUTE,
> },*/
> /**THIS HOLE FOR ARM TRUSTED FIRMWARE**/
>
> /* RAM*/ {
> .phys_start = 0x43040000,
> .virt_start = 0x43040000,
> .size = 0x38EC0000,
> .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
> JAILHOUSE_MEM_EXECUTE,
> },
>
> /* IVSHMEM shared memory region */ {
> .phys_start = 0x7BF00000,
> .virt_start = 0x7BF00000,
> .size = 0x100000,
> .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
> },
> },
>
> .irqchips = {
> /* GIC */ {
> .address = 0x10510000,
> .pin_base = 32,
> .pin_bitmap = {
> 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
> },
> },
> },
>
> .pci_devices = {
> {
> .type = JAILHOUSE_PCI_TYPE_IVSHMEM,
> .bdf = 0x00,
> .bar_mask = {
> 0xffffff00, 0xffffffff, 0x00000000,
> 0x00000000, 0x00000000, 0x00000000,
> },
> .shmem_region = 7,
Keep this up-to-date when disabling a region. Should be 6 now.
> .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
> },
> },
> };
>
Jan
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