On 02/12/2011 03:46 AM, Oliver Seitz wrote:
The pins are the same, no matter if they are configured as SPI or USART. (I2C 
can be different, e.g. limited slew rate). The usualy given maximum speed for 
RS232 thinks of +/-12V levels, plugs, and cabling outside a device. There are 
limits, and I wouldn't try more than 115kBaud then. But if the signals stay on 
one PCB, there is no real difference between USART and SPI regarding 
transmission speed.


Makes sense.


Daisy-chain is not really a bus. There is no limit when daisy-chaining. The 
single devices do not know that they are daisy-chained, it is the software's 
job to find out which byte shall be used by a single device, and which is only 
passing through.

When wiring as a bus, there are several soft limits: Electrically, how many 
inputs can one output drive? Can be increased by buffers. Logically, how mand 
CS-lines can I provide? Can be increased by port expanders, shift registers, 
latches, line decoders or counters. In other words: There is also no hard limit.

Hard limits only exist in busses that have a mandatory device numbering like 
I2C.

Interesting.


I don't quite remember the control lines... You are right, if you can set both 
the Master and the Slave drive bus outputs to HI-Z using the control pins, you 
can easily add more drives. But then, there's no reason to say it was 
impossible to use more than four.

I was thinking more of a "daisy-chain" setup for PATA.

The control lines in the schematic I linked before were A0, A1, A2, Read, and Write. If one set can be controlled by 5 control pins... then a second set can be added for the price of 5 additional control pins. That brings the total IO usage up to 26... nearing the limit of a 40 pin device.

I would hazard a guess, however... that the Read and Write pins could also be "daisy-chained" like the data bus... reducing the need for additional pins to 3. Reducing the earlier estimate of 26 IO pins to 23.

In the original schematic, CS0 was hooked to ground, and CS1 was hooked to VCC.

I'm not sure a "HI-Z" state on the control pins would work for pata drives... but it'd be worth investigating.

I'm not very familiar with the PATA bus as a whole... so there may be other/better ways of doing what I want than what I'm currently thinking.

I'd welcome suggestions.

Lyos Gemini Norezel

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