Commit-ID: 5d10cbc91d9eb5537998b65608441b592eec65e7 Gitweb: https://git.kernel.org/tip/5d10cbc91d9eb5537998b65608441b592eec65e7 Author: David Woodhouse <d...@amazon.co.uk> AuthorDate: Thu, 25 Jan 2018 16:14:11 +0000 Committer: Thomas Gleixner <t...@linutronix.de> CommitDate: Fri, 26 Jan 2018 15:53:17 +0100
x86/cpufeatures: Add AMD feature bits for Speculation Control AMD exposes the PRED_CMD/SPEC_CTRL MSRs slightly differently to Intel. See http://lkml.kernel.org/r/2b3e25cc-286d-8bd0-aeaf-9ac4aae39...@amd.com Signed-off-by: David Woodhouse <d...@amazon.co.uk> Signed-off-by: Thomas Gleixner <t...@linutronix.de> Reviewed-by: Greg Kroah-Hartman <gre...@linuxfoundation.org> Cc: Tom Lendacky <thomas.lenda...@amd.com> Cc: gno...@lxorguk.ukuu.org.uk Cc: a...@linux.intel.com Cc: ashok....@intel.com Cc: dave.han...@intel.com Cc: karah...@amazon.de Cc: ar...@linux.intel.com Cc: torva...@linux-foundation.org Cc: pet...@infradead.org Cc: b...@alien8.de Cc: pbonz...@redhat.com Cc: tim.c.c...@linux.intel.com Cc: gre...@linux-foundation.org Link: https://lkml.kernel.org/r/1516896855-7642-4-git-send-email-d...@amazon.co.uk --- arch/x86/include/asm/cpufeatures.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 0a51070..ae3212f 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -269,6 +269,9 @@ #define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */ #define X86_FEATURE_IRPERF (13*32+ 1) /* Instructions Retired Count */ #define X86_FEATURE_XSAVEERPTR (13*32+ 2) /* Always save/restore FP error pointers */ +#define X86_FEATURE_AMD_PRED_CMD (13*32+12) /* Prediction Command MSR (AMD) */ +#define X86_FEATURE_AMD_SPEC_CTRL (13*32+14) /* Speculation Control MSR only (AMD) */ +#define X86_FEATURE_AMD_STIBP (13*32+15) /* Single Thread Indirect Branch Predictors (AMD) */ /* Thermal and Power Management Leaf, CPUID level 0x00000006 (EAX), word 14 */ #define X86_FEATURE_DTHERM (14*32+ 0) /* Digital Thermal Sensor */