On Thu, 07 May 2026 22:36:25 -0700, Changhuang Liang wrote: > Add bindings for the Peripheral-1 clock and reset generator (PER1CRG) > on the JHB100 RISC-V SoC by StarFive Ltd. > > Signed-off-by: Changhuang Liang <[email protected]> > --- > .../clock/starfive,jhb100-per1crg.yaml | 70 +++++++++++++++++++ > .../dt-bindings/clock/starfive,jhb100-crg.h | 60 ++++++++++++++++ > .../dt-bindings/reset/starfive,jhb100-crg.h | 19 +++++ > 3 files changed, 149 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/clock/starfive,jhb100-per1crg.yaml >
Reviewed-by: Rob Herring (Arm) <[email protected]>
