On 08/22/2018 10:38 PM, Wolfram Sang wrote: >> The DM_CM_RST register actually has bits 0-31 defaulting to 1s and bits >> 32-63 defaulting to 0s -- fix off-by-one in #define RST_RESERVED_BITS. >> >> Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com> > > Reviewed-by: Wolfram Sang <wsa+rene...@sang-engineering.com> > > Suggesting stable.
Stable looks at the Fixes: tags now. Should I add that? MBR, Sergei
