On Wed, Aug 22, 2018 at 10:41:56PM +0300, Sergei Shtylyov wrote: > On 08/22/2018 10:38 PM, Wolfram Sang wrote: > > >> The DM_CM_RST register actually has bits 0-31 defaulting to 1s and bits > >> 32-63 defaulting to 0s -- fix off-by-one in #define RST_RESERVED_BITS. > >> > >> Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com> > > > > Reviewed-by: Wolfram Sang <wsa+rene...@sang-engineering.com> > > > > Suggesting stable. > > Stable looks at the Fixes: tags now. Should I add that?
Yes, that would be great IMHO.
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