On Mon, 25 Jan 1999, Robert M. Hyatt wrote:
> its a manufacturing issue. They don't do a special 333 (or 366) mhz
> L2 for the celeron, they use the stock PII cache with 128kb rather than
> 512kb. Saves money by using economy of scale in production. IE it is
> cheaper to make 400mhz 128kb L2 modules than it is to make some 400mhz
It is a manufacturing issue, but that is somewhat incorrect.
The PII uses external cache chips in the same "CPU module".
The Celeron uses on-die cache that is integrated into the CPU core.
I suspect that the reason is that most Celerons are good for 400MHz or so,
but Intel didn't want to cut into their profits of PII's at faster
clockspeeds. Now that the PIII is due out soon, Intel has released
Celerons at higher clock speeds. They are also undercutting AMD's prices
on K6-2's. Making less money for your products is better than someone
else getting it instead, no?
Sketch
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