Add a callback to the pll_params for custom dynamic ramping
functions which can be specified per PLL.
Reviewed-by: Benson Leung <ble...@chromium.org>
Signed-off-by: Bill Huang <bilhu...@nvidia.com>
Signed-off-by: Rhyland Klein <rkl...@nvidia.com>
---
v6:
- Added kerneldoc
- Moved adding dyn_ramp callback from set_defaults patch to this patch
- Reordered patch
drivers/clk/tegra/clk-pll.c | 7 +++++++
drivers/clk/tegra/clk.h | 4 ++++
2 files changed, 11 insertions(+)
diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
index f878bc879df2..c6cb22cebac1 100644
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
@@ -660,6 +660,13 @@ static int _program_pll(struct clk_hw *hw, struct
tegra_clk_pll_freq_table *cfg,
_get_pll_mnp(pll, &old_cfg);
+ if (state && pll->params->defaults_set && pll->params->dyn_ramp &&
+ (cfg->m == old_cfg.m) && (cfg->p == old_cfg.p)) {
+ ret = pll->params->dyn_ramp(pll, cfg);
+ if (!ret)
+ return 0;
+ }
+
if (state)
_clk_pll_disable(hw);
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index ae42e3e6a116..d29d095659a2 100644
--- a/drivers/clk/tegra/clk.h
+++ b/drivers/clk/tegra/clk.h
@@ -213,6 +213,8 @@ struct tegra_clk_pll;
* is already enabled, it will be done the first
* time the rate is changed while the PLL is
* disabled.
+ * @dyn_ramp: Callback which can be used to define a custom
+ * dynamic ramp function for a given PLL.
*
* Flags:
* TEGRA_PLL_USE_LOCK - This flag indicated to use lock bits for
@@ -284,6 +286,8 @@ struct tegra_clk_pll_params {
unsigned long (*adjust_vco)(struct tegra_clk_pll_params *pll_params,
unsigned long parent_rate);
void (*set_defaults)(struct tegra_clk_pll *pll);
+ int (*dyn_ramp)(struct tegra_clk_pll *pll,
+ struct tegra_clk_pll_freq_table *cfg);
};
#define TEGRA_PLL_USE_LOCK BIT(0)
--
1.7.9.5
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