Thanks to all (Tyson, Peter, Eric, Denis) for the info.
I enabled the L1 cache by clearing CD/NW bits in CR0 and then setup a variable MTRR
(reg 0) for the
size of my main memory (memory type = writeback). Seems to work okay.
Do I need to enable caching of page directories via PCD/PWT in CR3 at boot time or
will this be done
by Linux later on?
Also, does anyone know of any Linuxbios support for the 440BX chipset since it is the
one I use on
my board.
Thanks again,
-bill
----- Original Message -----
From: "Denis Dowling" <[EMAIL PROTECTED]>
To: "Terrell, Bill" <[EMAIL PROTECTED]>
Cc: <[EMAIL PROTECTED]>
Sent: Tuesday, February 27, 2001 6:26 PM
Subject: Re: how to enable cache for Pentium III (coppermine) chip
> "Terrell, Bill" wrote:
> >
> > does anyone have any code which enables the L2 cache for the Pentium
> > III (coppermine) chip?
>
> As stated earlier the coppermine chip does not need L2 cache setup code.
> Any Intel CPU with cpuid >= 0x680 has cache on the die and is setup
> correctly at reset. The first few lines of intel_l2_configure() check
> for this. All of the rest of the mess for L2 cache enable is for the PII
> with the external L2 cache chips.
>
> Regards,
> Denis.
>
