C.Bäckström wrote:

> Ok, so it seems I can base the whole thing on Athlons then. So SiS has the
> L2 cache working with linuxbios? Would that be with their 735 chipset?
> That's not in CVS, though, is it? 

All the code for the K7 with SiS 730S was posted by SiS except for the 
L2 cache init., since the L2 cache init is under NDA.

Bari



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