Bari Ari wrote:
>
> C.Bäckström wrote:
>
> > Ok, so it seems I can base the whole thing on Athlons then. So SiS has the
> > L2 cache working with linuxbios? Would that be with their 735 chipset?
> > That's not in CVS, though, is it?
>
> All the code for the K7 with SiS 730S was posted by SiS except for the
> L2 cache init., since the L2 cache init is under NDA.
I wonder why AMD thinks that turning on their L2 cache is valuable
intellectual property... Maybe the Durons are actually Athlons with a
different name?
Have we exhausted all avenues with AMD on this one? I'd be happy to
spend some time lobbying them.
Allen
>
> Bari
