djtodoro added a comment.
Great! Thanks!
I think we should update the `LangRef.rst` (entry_values section) as well.
In addition, can we add a test case checking MIR output after `LiveDebugValues`?
================
Comment at: llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param.mir:18
+# CHECK-NEXT: [0x0000000000000000, 0x0000000000000010): DW_OP_breg0 W0+0
+# CHECK-NEXT: [0x0000000000000010, 0x000000000000001c):
DW_OP_entry_value(DW_OP_reg0 W0))
+# CHECK-NEXT: DW_AT_name ("f")
----------------
I know that the final effect is the same, but should this be `DW_OP_entry_value
2 DW_OP_bregN 0` instead of `DW_OP_entry_value 1 DW_OP_regN`?
================
Comment at: llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param.mir:71
+ !24 = !DILocation(line: 5, column: 24, scope: !13)
+ !25 = !DILocation(line: 6, column: 23, scope: !13)
+ !31 = !DILocation(line: 6, column: 20, scope: !13)
----------------
Nit: !25-36! could be attached to !24
================
Comment at: llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param.mir:79
+---
+name: bar
+alignment: 4
----------------
I believe we do need all the attributes.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D80345/new/
https://reviews.llvm.org/D80345
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