================
@@ -1243,6 +1248,11 @@ class LLVM_ABI TargetRegisterInfo : public
MCRegisterInfo {
bool checkAllSuperRegsMarked(const BitVector &RegisterSet,
ArrayRef<MCPhysReg> Exceptions = ArrayRef<MCPhysReg>()) const;
+ virtual const TargetRegisterClass *
+ getConstrainedRegClass(const TargetRegisterClass *RC) const {
+ return RC;
+ }
----------------
arsenm wrote:
Missing documuentation but this most likely shouldn't be added
https://github.com/llvm/llvm-project/pull/175002
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