================
@@ -3915,6 +3924,11 @@ SIRegisterInfo::getRegClassForSizeOnBank(unsigned Size,
}
}
+const TargetRegisterClass *
+SIRegisterInfo::getConstrainedRegClass(const TargetRegisterClass *RC) const {
+ return getProperlyAlignedRC(RC);
+}
----------------
arsenm wrote:
Remove this. This is spreading an AMDGPU hack
https://github.com/llvm/llvm-project/pull/175002
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