well, yes. But that is the only atomic operation supported. No add, sub, inc, xadd, bit operations....
Le ven. 20 janv. 2017 à 14:31, Joe Savage <joe.sav...@arm.com> a écrit : > > I wonder what processor supports 128 bits atomics. As far as I know Intel > > > does not support it. Lock prefix is not allowed on SSE instructions. > > > > Actually, Intel does support them through a locked cmpxchg16b. And ARMv8 > > through load exclusive pair and store exclusive pair. > >
