> I've never heard of failed CAS being cheaper
I'm referring to this old (but good) article: 
https://blogs.oracle.com/dave/biased-locking-in-hotspot

Il giorno sabato 14 settembre 2019 21:41:56 UTC+2, Vitaly Davidovich ha 
scritto:
>
> On x86, I’ve never heard of failed CAS being cheaper.  In theory, cache 
> snooping can inform the core whether it’s xchg would succeed without going 
> through the RFO dance.  But, to perform the actual xchg it would need 
> ownership regardless (if not already owned/exclusive).
>
> Sharing ordinary mutable memory isn’t scalable, forget locks :) Just doing 
> plain loads/stores of shared memory will kill scalability (and perf) due to 
> cache coherence traffic.
>
> ARM uses LL/SC for CAS, and is much more susceptible to failures (eg even 
> if the value is expected, if the line has been refreshed after the LL part, 
> it fails).  But, I’m not overly familiar with ARM internals/mechanics.
>
> On Sat, Sep 14, 2019 at 3:20 PM Francesco Nigro <nigr...@gmail.com 
> <javascript:>> wrote:
>
>> Although not mentioned (neither on Doug's cookbook) I have always 
>> supposed was more likely the c++ default for both weak/strong CAS ie 
>> seq_cst memory ordering.
>> To make this question more mechanical sympathy focused: on hardware level 
>> what happen? I would be curious to know both x86/arm versions for this, 
>> what kind of memory reordering are guaranteed...
>>
>> Most people says that a failed CAS cost much less then one that succeed, 
>> but just like a load or more? 
>> Probably the success will cause invalidation of all the caches that 
>> reference the cache line changed, but the failed case should lock (on x86) 
>> it and AFAIK locks (hw or SW) are not well known to be scalable and 
>> performant :)
>>
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