----- Original Message -----
From: "Brian J. Beesley" <[EMAIL PROTECTED]>
> It would also be interesting to find out if the PIII prefetch code
> benefits the AMD K6 processor. The K6-2 and K6-3 do have an Athlon-
> compatible prefetch instruction, though it's using 32-byte cache
> lines and there is no prefetch queue i.e. only one prefetch can be
> active at any time.
Just tried it on my k6-2, needs CpuSupportsPrefetch=1 in local.ini,
and results in an illegal instruction exception.
So the program probably does not use the AMD 3dnow! prefetch instruction,
PREFETCH(W),
but one of the intel MMX2 or SIMD prefetch instructions not on the K6-2,
PREFETCHNTA orPREFETCHT[123]
> BTW what happens to the prefetch instructions for those processors
> (like PII) that don't support prefetch?
See above for the K6-2
George de Fockert
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