the thing I need is: 2 JK triggers, couple of xor, and, or devices, 32 bit bi-directional counter and for latches with capable with Z state.
Ok, thanks, I'll check. ~d On Thursday 21 November 2002 12:56, Stefan Wimmer wrote: > From: Dmitry [mailto:[email protected]] > > > has anybody experience in > > 1. cascading 74f579 (8 bit bidirectional counter or are there > > more bits > > up/down counters which work up to 10 MHz?) > > 2. interfacing it (5v vcc) with msp430 via latch > > Do you know about the Coolrunner CPLDs from Xilinx (developed by Philips > IIRC)? > http://www.xilinx.com/products/cr2/overview.htm > The software to configure the CPLDs (ISE WebPack) can be downloaded for > free. > http://www.xilinx.com/ise/ise_promo/ise5_cr2.htm > > They'd solve both 1. and 2. with the additional benefit that their power > consumption fit the MSP more than a 74Fxxx. > > HTH, > Stefan > > > ------------------------------------------------------- > This sf.net email is sponsored by:ThinkGeek > Welcome to geek heaven. > http://thinkgeek.com/sf > _______________________________________________ > Mspgcc-users mailing list > [email protected] > https://lists.sourceforge.net/lists/listinfo/mspgcc-users -- /******************************************************************** ("`-''-/").___..--''"`-._ (\ Dimmy the Wild UA1ACZ `6_ 6 ) `-. ( ).`-.__.`) Enterprise Information Sys (_Y_.)' ._ ) `._ `. ``-..-' Nevsky prospekt, 20 / 44 _..`--'_..-_/ /--'_.' ,' Saint Petersburg, Russia (il),-'' (li),' ((!.-' +7 (812) 3468202, 5585314 ********************************************************************/
