On Sat, 22 Apr 2000 23:22:57 +0200, Laurens Holst wrote:
>By the way, an idea just popped into my mind...
>For the Z180 CPU, eventually also an 'emulation' TSR could be made, which
>emulates the Z380 through 'trapping' of illegal opcodes. It will be _really_
>slow though...
But it'll not "that hard" to do... But it'll only works if the Z380 program
is in the first 1Mb, since Z180 only addresses lineraly the first 1Mb. (-;
>I am wondering... Do the registers IXh IXl IYh and IYl really exist on the
>Z180??? I doubt it, because otherwise their locations at least should have
>been indicated (otherwise the usage of trapping on an undocumented
>instruction will be very confusing since it does not work).
I don't know. But I think it's possible to "add" this instructions. (-;
In the same way as ADVRAM works, but doing a "bridge" over Z180.
>Or will those registers be emulated through trapping???
It's possible, but very slow. Timing dependent apps will suffer a lot.
But it'll be a "fast" workaround.
>That will be slow (but it'll work, and as long as the instructions aren't
>used it is still fast) (might cause some -a lot, in fact- incompatibility
>issues with programs using them)...
These instructions are very slow on MSX Z80 and R800. You shoud avoid
using them on normal MSX. It'll be difficult, but the speed you'll gain
will compensate the work.
>I'll read the entire 'trapping' docs... See what the possibilities are.
>Will come back at it later.
Ok! (-;
AbraçOS/2, Daniel Caetano ([EMAIL PROTECTED])
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