Laurens Holst wrote:
>I see nothing about IXh and IXl but they'll probably be there, undocumented,
>just like on the Z80. However, according to Patriek they are on a different
>location, and that explains the nessacary remapping.
I never said that!?!
AFAIK Z180 traps all illegal opcodes with an exception (although I'm not
100% sure, it's what it says in the Z380 manual)
And since IXH/IXL aren't documented on Z180, I don't think they can be used
normally at all. So I guess that's why they need special handling.
> > Are they?
>
>Patriek said they were.
And they are, according to the Z380 manual you qouted yourself!
> > They are!!! (((-; He has Mult also... and Div, something Z80 is
> > very slooooooooooooooooow to do.
Where'd he get the idea Z180 has DIV??? :/ It only has 8x8=16bit MLT!
(but you know that ;))
> > I think you have not got the ADVRAM idea. I think it's better than
>increasing
> > main processor speed. ((((-;
>
>I am indeed not enthousiastic about it.
me neither... Although it's probably infinitely easier to program than
using I/O, I don't see how it can provide the huge speed-up that's being
suggested. Besides greater speed for 3D and video, that are totally
unimportant to most games.
As far as I understand it, it is only benificial for pixel plotting and
linear VRAM operations. And it's more complicated in SCREEN7-12 because of
the interleaved VRAM! When I/O-ing the VDP takes care of the interleaving,
but with ADVRAM you probably end up doing it yourself.
It's exactly the multi-processing of VDP and Z80 that makes MSX so fast for
games. Let's take for example an HMMC routine, one of the most used
instructions for transferring RAM to VRAM, like I used in GEM.
It needs several calculations each character (8x8) line, so an OTIR is out
of the question.
So in stead of storing bytes (8 pixels screen 5) 4 in registers and then
OUT'ing them, with ADVRAM I could write them to VRAM immediately during
calculation. That would be benificial if it were not so that I would need
an EXTRA 16 bit register to keep the VRAM destination address, AND I would
have to do incrementation and the 8x8-wrapping myself!
>But anyways, the Z380 also has a mode to use the 32-bit mode but still use
>the 64k adress range. That one could be emulated. And I think at first most
>Z380-specific programs will be made for that mode.
It's not so much a mode, than it is the normal Z80 mode but using the
extended Z380 instructions. A DDIR LW before a LD BC,nn will make it a LD
BCz,nn and a DDIR LW,IW will make it a LD BCz,nnnn. (Where I used BCz to
indicate a 32bit register)
---
Regarding the extended Z380 instruction set, I want to make a few things clear.
The 32-bit instructions are almost non-existent. Most are only 16-bit
instructions with a prefix.
The biggest addition to the instruction set are the 16bit instructions:
LD r16,r16
EX r16,r16
EX r16,r16'
LD r16,(r16)
OR/ADD/RLC/etc r16
LD r16,(index)
ADD/SUB HL,(n16)
For 8bit and others:
EX r8,r8
EX r8,r8'
For 32bit:
MULTU/MULT/DIVU r16
8,16,24 bit relative JR/DJNZ/CALR
8,16,24 bit IX/IY/SP indexing
And lot's of others. So only a VERY small portion of the instruction set is
used for the extra registers (a few LDCTL instructions).
And the more than quadrupled increased register set is only a VERY small
part of the Z380's power.
Patriek
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